0

Imagine you are trying to write Bare Metal applications on a Xilinx Zynq 7030 board.

Since burning sd cards all the time gets tiresome, you want to establish a JTAG connection. You get a JTAG HS3 programming cable, set up your lovely ARM DS-5, write a nice test "Hello world!" program.... and then what?

How would you establish a connection between your workstation and the Zynq board via JTAG? What are the next steps?

Mike Meyers
  • 103
  • 3

3 Answers3

0

I'm going to quote the Vivado Programming and Debugging Manual here:

  1. Open the Hardware Manager.
  2. Open a hardware target that is managed by a hardware server running on a host computer.
  3. Associate the bitstream data programming file with the appropriate FPGA device.
  4. Program or download the programming file into the hardware device.

Your programming cable is even explicitly mentioned in the manual. Follow the steps of chapter 4 starting on page 23 and you should be fine.

EDIT: By a freak chance, I found this document while looking for something else, it might be useful to you(the Xilinx Doc tool is a crazy thing). There is a project type literally called "Bare-Metal Executable". There is even a video called "Zynq Bare-Metal Application Development".

koalag
  • 254
  • 3
  • 14
  • True - do you know how to establish such a connection for bare metal work ( I.e. write C++ code on the cores themselves) though? Managed to do it through Xilinx SDK 2017.1, but not through DS-5 – Mike Meyers Mar 06 '18 at 14:10
  • I just edited my answer to add a link that might help. This is about as bare-metal as it gets I think. If you're simply trying to write software in DS-5 and then running it on your board, this should do the trick. – koalag Mar 07 '18 at 12:06
0

The easiest way to interact with the board via JTAG is with the Xilinx Internal Logic Analyzer (ILA).There are tutorials and documentation here.

The ILA allows you to monitor as well as control internal FPGA signals. The only real downside is that it is not available on the free Webpack version of the software.

EDIT:

I stand corrected. It seems that the ILA is now supported for the Webpack edition.

crj11
  • 5,480
  • 1
  • 13
  • 32
0

On top of the answers given:

Text output
Xilinx have UART redirection in which the UART TX/RX data is send to/from a terminal window on your PC over the JTAG cable. A real UART connection is not required. That is where your "Hello world" text comes out.

Program/data upload/download
In the GUI under JTAG you can bulk upload and download data to/from the memory. I have used that to upload images so I could test image processing SW.

Oldfart
  • 14,212
  • 2
  • 15
  • 41