Is it okay to use a MOSFET in its resistive region with a heat sink?

Question

Using transistors in with limited gate (or base) voltage will make them limit current, which will introduce a significant voltage drop across the transistor, causing it to dissipate energy. This is considered bad, wasting energy and shortening the life of the component. But if I keep the temperature low, either with a heat sink or by limiting the power, is it okay to use a MOSFET this way? Or is it fundamentally bad for the component to make it dissipate power?

I ask because I get excellent results by controlling a MOSFET with variable voltage to drive an LED strip. With 8-bit PWM, the LED jumps in brightness from zero to "reading a book" levels, while the voltage-driven mosfet allows very smooth turn on, despite also using 8-bits of voltage levels. Linear versus exponential power makes all the difference, and PWM is linear. Our eyes don't perceive light linearly. The voltage-controlled result is too good to not use.

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Addendum: I have done extensive experimentation with PWM, including adjusting the prescalers. Changing the PWM duty is not an effective solution, though if someone wants to donate an oscilloscope, I might be able to make it work :)

Addendum: The project is a lighting up alarm clock, like these Philips products, but more carefully tuned. It is imperative that the gradation between the low power levels be miniscule. The brightest acceptable low-power state is around 0.002%, and the next is 0.004%. If it's an x/y problem to ask about the solution rather than problem, then this is an intentional x/y question: I've found my preferred solution after extensive testing, and I want to know if my solution is workable. The device is currently working with a less preferred workaround involving a much dimmer auxiliary light.

Addendum 3: I gather this is what BJT transistors are used for. Since they're current-controlled, the circuit is much harder. I need to look into that when I have time to draw diagrams. I'll post another question if I have trouble.

Answer 1

TL;DR Use BJTs for linear operation, not FETs

Most FETs are not rated for safe operating area (SOA) at DC. Bipolar junction transistors (BJT) are.

If you examine the SOA graph for any FET, you'll find a set of curves for pulses of duration 1 µs, 10 µs, 1 ms, etc., but rarely any curve for DC. You can try to extrapolate to 'near DC' if you like, at your own risk. It means the manufacturer is not willing to put a figure on how much dissipation is allowed in DC operation.

It's often said that FETs parallel nicely, because of their positive resistance temperature coefficient. As they get hot, their resistance increases, so the current will decrease in the hot one, and the situation is stable. FETs are made of multiple paralleled cells internally, so they share OK as well, right? Wrong!

It is only for the temperature coefficient of resistance. FETs also have another temperature coefficient, which is the temperature coefficient of the threshold voltage, and that's negative. As the FET heats up, at constant gate voltage, it draws more current. When the gate voltage is very high, saturating a switched FET, the effect is minimal, but when the voltage is down around the threshold, it is very strong. As one cell heats up, its current increases, so it heats up some more and has the potential for thermal runaway, where one cell tries to hog the entire current through the device.

This effect is limited by two things. One is that the die tends to start at the same temperature all over if it hasn't been subject to uneven heating. So it takes time for the instability to grow. This is why short pulses can use more power than long pulses. The second is the thermal conductivity across the die, which tends to even out the temperature across it. This means that a certain threshold power level is needed for the instability to grow.

BJT manufacturers tend to put a figure on this power level, but FET manufacturers don't. Perhaps it's because that the DC SOA level is a much smaller fraction of its 'headline' power dissipation in FETs that it would be embarrassing to spell it out. Perhaps it's because in linear operation, so many advantages of a FET fall away that it's only worth using BJTs for any specific power level that there's no commercial incentive for them to qualify FETs for DC use.

Part of the reason that BJTs can have a large area stable junction and FETs don't is down to the way they work. The 'threshold' for BJTs, the 0.7 V V_be, is a function of the material, and it is very consistent across the large die. The threshold for FETs depends on the the thickness of the thin gate layer, which is a manufactured dimension, poorly defined (you know how wide the specification for FET V_gsth is in a data sheet!) by being the small difference between two large diffusion steps.

That said, there are some FETs that are characterised for DC use. They are few and far between, and they are very expensive, compared to their switching-optimised brothers. They will have had more testing and qualification, and use a different process that sacrifices low on resistance and some other beneficial FET traits.

Use a Darlington transistor if you want low base drive current. The extra 0.7 V min V_ce is largely irrelevant given that you're going to be operating it linearly.

If you still want to use a switching FET for DC operation, then stick to 5% to 10% of the headline dissipation. You may well get away with it.

Janka asked an interesting question in comments, 'what about an IGBT?'. According to this app note, No detailed characterization of IGBTs as linear amplifiers has been carried out by IR, given the limited use of IGBTs in this type of application.

The VI graph from this data sheet for the NGTG50N60FW-D

shows the typical inflection at 9.5v \$V_{GE}\$ that characterises thermal instability, at 8v an increase in temperature from 25C to 150C results in a tripling of collector current, which sounds fairly unstable.

However, the SOA graph

does have a DC line, and that line is at just over 200Watts, the headline power of the device. Have they characterised it properly?

An IGBT requires no current to drive it, but does need more gate volts than a Darlington needs base volts, so may or may not be easier to drive. At the moment, I've not found any definitive information on IGBTs in this mode of operation.

Answer 2

Unfortunately modern power MOSFETs fail when operated in the linear region at high power dissipations.

MOSFETs are safe to use in the linear mode as long as the drain current decreases with increasing temperature.

Most MOSFETs have a crossover below which they can experience thermal runaway and above which they don't. For very "good", low Rds(on) low Vth MOSFETs this crossover happens at a very high gate-source voltage and drain current. If you look at the "worst" MOSFETs some have the charge carrier dominated region at such low power it doesn't matter. E.g. IRFR9110 is safe at all Id > 1A

It has a Rds(on) of 1.2 ohms, but if you're going to be using it in linear mode that doesn't matter at all!

The other way to stay safe is to keep the power low enough. Power MOSFETs are made of many parallel cells, which in the (safe) mobility dominated region share current equally, but in the (unsafe) charge carrier dominated region don't, because hotter cells take more of the current and so get hotter. Fortunately the cells are very well thermally coupled, being on the same die, so if operated at a low enough power the die temperature will be nonuniform but will not exceed the limits.

NASA paper: https://ntrs.nasa.gov/archive/nasa/casi.ntrs.nasa.gov/20100014777.pdf

More readable OnSemi appnote: https://www.onsemi.com/pub/Collateral/AND8199-D.PDF

Answer 3

MOSFETs can be fine in linear mode, but extra care needs to be taken because the MOSFET will not necessarily distribute the current flow though it in a even fashion. Here is an application note from OnSemi (fairchild) explaining some of this behavior - and trying to sell newer devices.

This problem will manifest as a failure in an apparent safe operating area, especially in a traditional logic level trench FET. Older planar power FETs (IRF / Infineon does this) and a few of the newer types work well in linear mode. Planar power FETs tend to have atrocious on-resistance vs. die size though.

Answer 4

Using transistors in with limited gate (or base) voltage will make them limit current, which will introduce a significant voltage drop across the transistor, causing it to dissipate energy. This is considered bad, wasting energy and shortening the life of the component.

This is bad when the transistor is intended to be used as a switch. If you intend to use it in linear mode, then it's the intended mode of operation and perfectly fine. However, some conditions must be respected in ordre not to damage it:

1) Max die temperature, ie Power x Rth

Rth is the "Thermal resistance from die to air" which is the sum of the thermal resistances:

• junction-case, see datasheet, depends on how the part is internally constructed
• case-heatsink, depends on TIM (thermal interface material, grease, silpad, etc, whether insulating or not) and it also depends on the surface area of the TIM (a big package like TO247 has a lot more than TO220 so it will have lower Rth)
• heatsink-air which depends on heat sink size, airflow, whether you use a fan or not, etc.

For low power (a few watts) you can use the PCB ground plane as a heat sink, there are a lot of ways to do this.

2) Safe Operating Area (SOA)

This is where your transistor blows.

When operated in linear (not switching) mode, both BJTs and MOSFETs will conduct more current for the same Vgs (or Vbe) when hot. Thus, if a hot spot forms on the die, it will conduct a higher current density than the rest of the die, then this spot will heat more, then hog more current, until it blows.

For BJTs this is known as thermal runaway or second breakdown, and for MOSFETs it is hotspotting.

This is heavily dependent on voltage. Hotspotting triggers at a specific power density (dissipation) on the silicon chip. At a given current, power is proportional to voltage, so at low-ish voltages it will not occur. This problem occurs at "high-ish" voltages. The definition of "highish" depends on the transistor and other factors...

It was common knowledge that MOSFETs were rather immune to this, "more rugged than BJTs", etc. This is true of older MOSFET technologies like Planar Stripe DMOS, but it is no longer true with the switching-optimized FETs like Trench technology.

For example check this FQP19N20, datasheet page 4 fig 9, "safe operating area". Notice it is specified for DC, and the graph has a horizontal line on top (max current), a vertical line on the right (max voltage) and these two lines are joined by a single diagonal line which gives max power. Note this SOA is optimistic, as it is at Tcase=25°C and other conditions, if the heatsink is already hot, of course SOA will be smaller. But this transistor is OK with operating in linear mode, it will not hotspot. Same for good old IRFP240 which is commonly used in audio amplifiers with great success.

Now look at the link posted by τεκ, it shows SOA graphs with an additional line on the right, with a very abrupt downward slope. This is when hotspotting occurs. You don't want to use these types of FETs in a linear design.

However, in both FETs and BJTs, hotspotting requires high-ish voltages compared to the max voltage. So if your transistor always has a Vce or Vds of a few volts (which it should have in this scenario) then there will be no problem. Check the transistor SOA. For example you can use an opamp-based current source, but you would run into the same problems at low current depending on the opamp's input offset voltage.

A better solution to your problem...

^{simulate this circuit – Schematic created using CircuitLab}

On the left: you can PWM one FET or the other. The different drain resistors determine current at the maximum PWM setting. When the PWM for the left FET reaches zero, you can continue decreasing the PWM of the other FET. This gives you much finer control in the low light intensities.

It's basically like a 2-bit power DAC with bit weights that you can adjust by choosing resistor values (and you should adjust resistors depending on what you need).

On the right this is the same, but a BJT wired as current sink provides analog control at low intensity.

I'd recommend going with the one on the left since it's the simplest and you probably have all the parts already.

Another good solution is to use a switching constant current LED driver with adjustable average current. This is the highest efficiency solution for high power LEDs. However if you drive a LED strip, this won't help much with efficiency, as the resistors in the LED strip will still burn power.

Answer 5

This question is an X-Y problem. A linear constant current driver can be made to drive LED's, yes. But it's very inefficient, and not required for the application.
There are plenty of constant current circuit to be found online.

With 8-bit PWM, the LED jumps in brightness from zero to "reading a book" levels

You can control the brightness with a logarithmic scale. I've used the below formula for similar effect.

$$pwm = 2^{x/((0.69*255)/\ln(255))} -1 $$

It outputs 8 bit PWM values based on an 8 bit brightness input. The 0.69 is there to make sure it ends at 255.

You might want to create a lookup table, since this isn't a microcontroller friendly computation.

Answer 6

Perhaps a different solution could be an external driver, such as Onsemi CAT4101.

You could set the LED current fairly low, and use the PWM to vary the brightness. If you need higher dynamic range, then you'd have to vary the current set resistor. This could be a digital pot, or maybe, with added complication, a FET driven from D/A (or another variable volt source such as a smoothed PWM).

Or, you could just switch the current set between two values, giving you high and low brightness ranges.