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Seeing a lot of mixed infomation around involving ground planes on multilayer boards. For a mixed signal mulitlayer PCB which is the preferred method? I know every board is different and it depends what your board is doing but I see alot of people with isolated ground planes yet Henry Otts advice is to do the exact opposite and partition the board in segments. Any advice or comments on this would be great!

Revilo Engineering
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    I rarely split planes (there *can* be occasions): https://electronics.stackexchange.com/questions/185306/analog-power-ground-planes-doubts/185320#185320 – Peter Smith Jan 05 '18 at 13:00
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    Possible duplicate of [Analog & Power Ground Planes Doubts](https://electronics.stackexchange.com/questions/185306/analog-power-ground-planes-doubts) – Trevor_G Jan 05 '18 at 13:12
  • @PeterSmith Thanks peter So if I understand correctly still use an isolation barrier but dont completely cut that segment of the board off from the rest of the board? Would I place this "gateway" under an opto-isolator for example? – Revilo Engineering Jan 05 '18 at 13:56
  • It is extremely difficult to give detailed advice without seeing the proposed layout. – Peter Smith Jan 05 '18 at 13:59
  • @PeterSmith Yes i understand completely I'm doing layout as we speak so I'll be sure to put something up when I have it. – Revilo Engineering Jan 05 '18 at 14:02
  • @PeterSmith Would you suggest the same practice for my power plane as well? – Revilo Engineering Jan 05 '18 at 14:03
  • @ReviloEngineering: For the vast majority of mixed signal boards, I would certainly recommend it. – Peter Smith Jan 05 '18 at 15:21
  • Splitting planes in general is a bad idea. I have seen a lot a app notes for mixed signal parts that recommend splitting planes and then connecting them with ferrite beads and/or capacitors. When I ask them why this needs to be done, the answer is we have always done it this way and if you don't follow our recommendation then it may not work. However they offer no proof that it is needed or better than solid planes. In some cases I have been told that split planes used to be recommend but now a solid plane is recommended. Keeping digital currents from flowing through the analog section is key. – EE_socal Jan 05 '18 at 17:26
  • @PeterSmith Hi Peter reviving this if you don't mind. Im slightly confused about the power plane, If I have need for different voltages (5V,3.3V etc.) wouldn't having these all on a solid power plane not work? Also for multiple 4-20mA transmitters do I need to worry about them interfering with eachother or do I just need to keep it all away from the digital section. – Revilo Engineering Jan 09 '18 at 14:04

2 Answers2

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It really depends on your design. Henry Ott says it will simplify your design in general.

Off the top of my head there are a few reasons you don't want split planes:
1) It turns your board into a dipole antenna
2) Crossing a split plane with a trace is bad because it increases inductance and complicates the paths for return currents.

enter image description here

There are reasons for splitting planes, in some cases it can reduce common mode noise or noise on the analog side of the ground plane. If your isolating your analog section completely (which I would not recommend, but is sometimes necessary) then you will need split planes.

Voltage Spike
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  • Yeah I have seen this image before just gets confusing when half of the manafacturers reccomend split planes! If you have any advice on how to layout the power plane using this method it would be greatly appreciated! – Revilo Engineering Jan 09 '18 at 14:05
  • Like I said in the post, it is completely design dependent – Voltage Spike Jan 09 '18 at 16:21
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I'm preparing some blog pages/content about this topic. But I'll summarize here.

If no charge moves between the analog and the digital sections, then you can pick either options.

Given mixed-signal systems tend to NEED to move digital data and control signals back and forth between the Analog and the Digital sections, there are several approaches;

1) use fiber optics to move data; I saw this used on an IR camera head inside a gymbol (track incoming missiles) with noise floor achieved of 17 nanoVolts/rtHz. There were no beathotes in the images.

2) adjust system timing

3) minimize the digital-interface charge injection; I once used +I and -I and Iref/2 (to set threshold) between FractionalN Synthesizer core-algorithm and the PLL charge pump; reference spur was shockingly low at -105dBc. The key is the balanced +I and -I, where lotta charge was moved but nearly nulled.

4) study the system ringing; understand why your silicon parts have ringing and study how to manage that ringing.

Just some thoughts.

analogsystemsrf
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