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I am trying to size the Q1-Q0 current mirror pair so that the emitter area of Q0 is N time as large as that of Q1. If I try to change the model of the 2N2222 NPN transistor (for example by changing the ratio Is, the saturation current, of Q1-Q0), then this change would apply to all 2N2222 NPN transistors in the circuit. I was wondering if there is any way to design/size a "single" transistor or MOSFET component?

enter image description here

Note: I have also looked into this post but it doesn't solve my problem. Am I missing something?

IgNite
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  • You can use the AKO statement – Mike Dec 29 '17 at 14:23
  • Are you wanting to design a MOSFET or a BJT? Different things, entirely. LTSpice is used internally for IC design (or, at least, it was last time I actually read something from Linear discussing it.) So it includes at least some of what they use for design. The MOSFETs are "dead easy," as you can specify their details almost trivially in LTSpice. For the BJT, use [MEXTRAM](https://www.nxp.com/wcm_documents/models/bipolar-models/mextram/mextramdefinition.pdf) by specifying level=504 for the BJT. I haven't done it myself. But it is supposedly supported in LTSpice. Says so in the docs. – jonk Dec 29 '17 at 22:20
  • Hmm. It might be better to go here for [MEXTRAM](http://www.eng.auburn.edu/~niuguof/mextram/codes/index.html). That page includes all the newer stuff that I'd missed earlier. It also includes the new 505, which might be a question to ask Mike Engelhardt about regarding LTSpice. It's possible he's already added 505 support. – jonk Dec 29 '17 at 22:29
  • Also see: [NXP's MEXTRAN docs](https://www.nxp.com/pages/mextram:MEXTRAM?tab=Documentation_Tab). – jonk Dec 29 '17 at 22:34

1 Answers1

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You can probably tell by my comments that it is not clear to me what you are trying to do. But I just noticed that I failed to correctly read something you wrote:

I was wondering if there is any way to design/size a "single" transistor or MOSFET component?

Since you show a picture of a BJT, mention the word "transistor" (which can mean quite a range of things including BJTs and MOSFETs), and then included "MOSFET", as well, I was left thinking that you were pretty deep into fairly technical aspects of transistor design and wanted to know if LTSpice could support your interests.

So I commented in light of that interpretation.

But it is possible to read things differently, looking with fresh eyes at this. And perhaps Mike directed you correctly in his comment.

For MOSFETs in LTSpice, you can use the nmos4 symbol and place it on the schematic. If you right-click on that symbol, you will see a dialog box that looks like:

enter image description here

And I think you can see where you can specify various details for the MOSFET. You can do this differently for each and every one you put on the schematic, so there is no requirement at all that they be the same.

Another approach is to drop down a regular schematic symbol (BJT or MOSFET) and then right-click on the Value (for example, the "NPN" that shows when you first add an NPN BJT to the schematic.) To begin, you will see something like the following if you do it correctly:

enter image description here

Here, change it to some special model name you want to create. Like "MYNPN" for example.

You can also control-right-click on the symbol and you will see, under "Value", a designation there that you can now edit. If you choose this method, the display will look something like:

enter image description here

Either approach works. The main thing is to change this name to something that isn't found anywhere else. Make up a name.

Once you have a named part, like this, you can now add a "card" on your schematic. You do this by hitting the "S" key. A dialog pops up looking like this:

enter image description here

Note that I've added some text. This text tells Spice that I want to define a new "model" of a device. I provide the name for it (MYNPN) and then use "ako:" to tell Spice to grab up a default model that I'd like to modify. In this case I used "2N2222" which happens to be in the standard BJT library. Then I specify the NPN() part at the end. Here, I can insert any specific parameters I'd like to over-ride in my own special model. The other parameters, those that I don't over-ride, will remain the same as in the default model I mentioned already.

Now, you have a new model on the schematic and LTSpice will demand that you place this new "card" on the schematic somewhere. Stick it in any convenient place. Location doesn't matter.

You can always right-click on these "cards" to change them, too. So you aren't stuck with mistakes you might make.

You could also NOT use the "ako:" keyword and instead just fill out the entire NPN() part of the "card." It is your call how you want to do that. If you use "ako:" then you get to pull up a bunch of default values that are similar to where you are headed and only modify the parameters you want to modify. If you don't use that keyword, then there still are defaults but now these are hard-coded ones deep inside of LTSpice and listed in the help file on the BJT. Either way, you over-ride the parameters you want to over-ride.

In short, you can create unique variations.

You can also parameterize them and make LTSpice go through a range of values. For example, you can tell LTSpice that you want the \$\beta\$ of a transistor to be varied from 100 to 300. You do this by setting up a new parameter value and using it within your .model card.

For example,

enter image description here

That shows two cards. One for the model, which refers to the parameter name BETA as an expression rather than a hard-coded value. Then I added a .step card which causes the parameter value to be modified repeatedly, starting at 100 and going to 300 in steps of 20.

There is a lot more you can do with LTSpice.

I very strongly recommend the following book:

The Spice Book
Andrei Vladimirescu

Definitely get yourself a copy of it. You won't be sorry.

jonk
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  • Sorry for my late response, and for my English if the last sentence was not close to what I was trying to do. Actually I was trying to size the current-mirror pair so that one BJT Q0 "copies", say, 10 times larger current from its pair BJT Q1. So I was trying to size the ratio of Q0-Q1 emitter area to achieve the above task. I was just wondering if there is a quick way to do so? – IgNite Dec 31 '17 at 07:38
  • Another example, quite off-topic but should demonstrate what I was trying to do, is when we wish to size the CMOS gate so that the rise and the fall time delays are equal. For example, for the inverter gate, we usually size the width `W` of PMOS to be `x` times wider than that of the NMOS to account for the lower mobility of PMOS and other factors. I was just wondering if we can do this in LTspice without naming a new model every time and use `AKO` keyword. Or this must be done during the layout phase? Hmm... I guess no because we need simulation first. – IgNite Dec 31 '17 at 07:51
  • By the way, your answer is helpful and as of now its (renamimg and using `AKO` keyword) the only way I can do so. I'll accept your answer. – IgNite Dec 31 '17 at 07:53