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I keep getting stuck when trying to draw this out. Mainly because the NAND Gates we are using are 2 inputs one output.

Chanced270
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  • You want something of the form: \$\overline{A\: B}=\overline{\overline{A_0\: A_1}\: \overline{B_0\: B_1}}=\overline{\overline{\overline{A_{00}\: A_{01}}\: \overline{A_{10}\: A_{11}}}\: \overline{\overline{B_{00}\: B_{01}}\: \overline{B_{10}\: B_{11}}}}\$, etc. Do you know how to proceed, at all? Hint: start with ((A' B' + B' D + A' C D)')' – jonk Oct 06 '17 at 05:35
  • Also remember (ab)'=a'+b' – RoyC Oct 06 '17 at 07:47
  • See https://electronics.stackexchange.com/questions/203605/what-is-the-point-of-converting-everything-to-nand-nor-and-how-do-you-do-it-righ/203612#203612 –  Oct 06 '17 at 11:04

2 Answers2

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Any logical expression can be implemented as either using NAND only circuit or NOR only circuit. This is because one can make the basic gates (AND, OR and NOT) using only NAND and only NOR gates.

So using this fact, we can draw the NAND only circuit for any logical expression following the steps given below:

  1. Draw the circuit using basic gates. (Use 2-input AND and OR gates, as you have only 2-input NAND gates)

  2. Replace these basic gates using their NAND equivalent.

    • NOT is NAND with shorted inputs
    • AND is NAND followed by NOT
    • OR is NAND with inverted inputs
      (see this answer for schematics)

  3. Simplify the circuit if possible (two NOT gates can come in series, one after the other, and can be replaced with a short).

PS: NOR only circuit can also be implemented using same algorithm by replacing the basic gates with their NOR equivalent in step 2.

nidhin
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Take deMorgan's on AND-OR and you will have NAND-NAND.

To get a 3-input NAND from 2-input NANDs:

\$ \overline{A \cdot B \cdot C} = \overline{A \cdot (B \cdot C)} = \overline{A \cdot \overline{\overline{B \cdot C}}}\$

You need three 2-input NANDs. One used as an inverter.

StainlessSteelRat
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