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I am new in this forum, I will listen and thank all your support. My goal is to know how to design the oscillator output resistors to enhance / optimize clock signal performance.

I have been working with the ic oscillator QX333A10.00000B15M and a FPGA Microsemi A3P1000. The datasheet of the oscillator does not specify any recommended circuit, however I have found two interesting documents:

https://www.microsemi.com/document-portal/doc_view/130778-proasic3-e-starter-kit-user-s-guide

https://irp-cdn.multiscreensite.com/0c45c4a0/files/uploaded/Oscillator-Application-Notes.pdf

In the first document, page 33, there is a circuit that models the oscillator, with a voltage divider and a serial output resistor. In the second document, page 4-5, there is some explanation about how these resistors are used to avoid signal reflections, however I does not understand at all, as well as what values select for the resistors.

Thank you very much for your help, Antonio Moreno.

antman
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    *page 33 ...with a voltage divider* You mean R28 and R29 ? Look carefully ! It looks like a voltage divider but it is not really. At least not for the clock. Note how these components are marked 1K_NL, I think **_NL** means that they're not placed. Also you do not need them. For U1 you just use a generic 40 MHz crystal oscillator (not a crystal ! but a crystal oscillator) which can be powered by 3.3 V and you're done. **There isn't much to design or optimize**. You choose the oscillator and you're done. – Bimpelrekkie Sep 04 '17 at 11:52
  • Partial duplicate of [this](https://electronics.stackexchange.com/questions/10884/how-termination-resistors-work-what-happens-if-i-use-lower-values); do some reading on transmission lines and electrical termination. – uint128_t Sep 04 '17 at 15:39

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