3

I read the ATX power supply design guide, and I have a question related to the PWR_OK line specifications. In "Table 21. PWR_OK Signal Characteristics" I saw the following: "Logic level high - Between 2.4 V and 5 V output while sourcing 200 μA". My question is: what does this mean exactly? When PWR_OK is high the current will be limited by the PSU at 200 uA, so I will not be able to draw more than that from the PWR_OK line?. Or if I am trying to interface something with the PWR_OK line I should take precautions not to draw more than 200uA?

stevenvh
  • 145,145
  • 21
  • 455
  • 667
Buzai Andras
  • 737
  • 4
  • 10
  • 20

1 Answers1

4

You'll most likely have to limit the current yourself. It's under that condition that the voltage is specified. Going higher than 200\$\mu\$A will probably cause the voltage to sag below 2.4V, which is the minimum for a high level in TTL. (I've also seen 2.7V as the minimum, I guess it depends on the TTL subfamily.)

Note that the same table says that "signal type = +5V TTL compatible", and that a low level is specified as < 0.4V. That output level is 0.4V less than the maximum TTL input level for a logic 0. And the 2.4V is 0.4V higher than the minimum for a high input level. This gives a 0.4V noise margin.

If you want to control a MOSFET with the PWR_OK signal, like OP, you'll need a logic level MOSFET, which draws enough current at a low \$V_{GS}\$. The BSG103 may be a good choice; it has an \$I_D\$ of 750mA at a \$V_{GS}\$ as low as 1.5V.

edit
On second thought the BSH103 may be too good. It has a \$V_{GSth}\$ of 0.4V, which means that worst case you'll have a drain current of 1mA with PWR_OK low. Even FETs with a \$V_{GSth}\$ of 1V typical indicate 0.4V as a minimum value. Can be fixed by using a resistor divider to lower the output voltage from PWR_OK. A 15k\$\Omega\$ + 25k\$\Omega\$ gives you a minimum gate voltage of 1.5V, while the current is maximum 125\$\mu\$A.

stevenvh
  • 145,145
  • 21
  • 455
  • 667
  • What I am trying to do is to signal to a MCU when the PSU is turned on and PWR_OK is asserted high. So for this I am thinking of using a N channel MOSFET with the gate connected to PWR_OK. The MOSFET should switch on when PWR_OK goes high and switch off when PWR_OK goes low. No high frequency switching is involved. In order to limit the current drawn from the PWR_OK line when the gate is charging, I am thinking of putting a resistor in series with the gate and the PWR_OK line. To limit the current to about 160 μA I should use a 30KOhm resistor (at 5V). Is this a good approach? – Buzai Andras May 22 '12 at 19:34
  • Isn't the resistor for the gate to big? Wouldn't is slow down too much the turn on time of the MOSFET? – Buzai Andras May 22 '12 at 19:35
  • @Buzai - You don't really need the resistor, the output impedance of the PWR_OK voltage will do. That gate capacitance is not that big. If you do want to use a resistor a 4k7 will do. Make sure your FET is a logic level FET, which gives you some drain current already at the 2.4V. – stevenvh May 23 '12 at 04:20
  • Thank you. One more thing. I also intend to put a 100k resistor from the gate to ground to prevent accidental turn-on off the FET. So instead of a 4k7 resistor I was thinking of using only a 1k resistor (the 1k and the 100k will form a voltage divider) to minimize the voltage drop across the resistor in series with PWR_OK and the gate. Are there any disadvantages in doing so? Is this setup ok? – Buzai Andras May 23 '12 at 14:28
  • @Buzai - That's good thinking, but I would use a 1M\$\Omega\$ resistor and keep the 4.7k\$\Omega\$. Do you already know which FET you're going to use? – stevenvh May 23 '12 at 14:45
  • Are there any other advantages of using a 1MΩ resistor instead of a 100kΩ resistor, other than that of getting to keep the 4.7kΩ resistor and getting a low voltage drop across it (across the 4.7kΩ resistor)? I haven't decided yet on the FET. Do you have any recommendation for it? :) – Buzai Andras May 23 '12 at 16:59
  • @Buzai - no other advantages. About the MOSFET, you don't say how much current you need, but the [BSH103](http://www.nxp.com/documents/data_sheet/BSH103.pdf) has excellent specs: needs only 1.5V \$V_{GS}\$ for a drain current of 750mA! – stevenvh May 23 '12 at 17:21
  • How about disadvantages of using a 1MΩ resistor? :). The BSH103 seems to be perfect for the job. My current requirements are very low. The FET will only pull down to ground a digital input pin on the MCU (the MCU pin is connected to +5V through a pull-up). I prefer the FET solution (instead of directly connecting the PWR_OK line to the MCU pin) in the hope that this way I can get some protection for the MCU in case something goes wrong with the PWR_OK line. Is this a correct approach? – Buzai Andras May 23 '12 at 19:37
  • I just saw your latest edit. How about if I use a MOSFET like the [IRL640](http://www.vishay.com/docs/91305/91305.pdf) from Vishay? If I understand correctly the datasheet then I will have a drain current of 250 uA at a 1V gate voltage. Will I still need to bring down the PWR_OK voltage with a resistive divider?. Unfortunately the IRL640 has a higher gate capacitance than the BSH103, so I guess it will draw more current from the PWR_OK line when it will turn on. Thank you :) – Buzai Andras May 24 '12 at 10:01
  • @Buzai - the 1V threshold for the IRL640 is the minimum, so that's safe. But it also says it can be as high as 2V. Fig.1 (very bad quality figures!) says 1A at 2.25V. That's a factor 4000 within just 250mV. Which makes me feel unsure about the minimum voltage for a reasonable drain current. Remember, worst case you'll only have 2.4V. I would stick with the BSH103, and the resistor divider. (You wanted the resistors anyway, one to limit the gate current, one pull-down.) – stevenvh May 24 '12 at 10:18
  • Just to make sure I understand it correctly: the setup should be the same as before just that instead of the 4.7k and 1M resistors I should use a 15k and a 25k resistor to lower the gate voltage of the BSH103? – Buzai Andras May 24 '12 at 10:41
  • @Buzai - Yes, the 25k goes to ground, and if you check it you'll see that you'll have between 1.5V and 3.1V for the gate. – stevenvh May 24 '12 at 10:48
  • I decided to go with the BSH103 :). But I still have one question. After re-reading all the posts I am not sure what do you mean by "[...] Which makes me feel unsure about the minimum voltage for a reasonable drain current." in your comment before your last comment. Could you please elaborate? (when the FET is turned on I only need about 5-10mA of drain current). – Buzai Andras May 24 '12 at 13:02
  • @Buzai - at 2V it may have only 250\$\mu\$A, and then, just 250mV higher it would already be 1A. Wouldn't there be tolerances on that too? That the 1A is only achieved at higher voltages? For 5-10mA I don't expect problems, you should get that at 2.4V minimum. – stevenvh May 24 '12 at 13:05
  • Sorry for bothering you again but I need one more clarification. On your latest edit, by "A 15kΩ + 25kΩ gives you a minimum gate voltage of 1.5V, while the current is maximum 125μA." you refer to the minimum when the PWR_OK line is high (at worst case 2.4V) and the current of 125uA is the FET drain current? How did you calculated the 125uA drain current. I can't seem to find that value in the datasheet of BSH103. It is from the graph from Figure 8 of the datasheet? Thank you. – Buzai Andras May 24 '12 at 18:48
  • @Buzai - That's the current from PWR_OK. Worst case for the gate voltage is 2.4V, but worst case for the current is when the voltage is highest: 5V. Then 5V/40k\$\Omega\$ is 125\$\mu\$A. You have to check that to see that it remains below the 200\$\mu\$ worst case. – stevenvh May 25 '12 at 04:16
  • Thank you. You are referring to the current limit to GND. Is this correct? Because the gate charging current will be only limited by the 15k resistor, and that would give a max current of 330 uA (without considering/knowing the PWR_OK line output impedance). – Buzai Andras May 25 '12 at 08:23
  • @Buzai - gate current is negligible, it's the current to ground that counts. If you want you can increase the resistor values to 150k\$\Omega\$ and 250k\$\Omega\$ if that makes you feel better. The larger resistor will switch the MOSFET on a bit slower, but that would only be a factor if you'd switch on and off all the time, like in PWM. – stevenvh May 25 '12 at 08:27