I am routing a JTAG signals through an Altera FPGA to a TI MCU. The signals are TMS
, TCK
, TDO
, TDI
, nSRST
.
I can also connect the JTAG directly to to the MCU as there is a 10 pin jtag header exposed on it.
If I route the signals TCK
, TDI
, TDO
, nSRST
through the FPGA and connect TMS
directly to the TMS
to the 10 pin jtag header on the MCU then it will flash the device.
However, if I route TMS
through the FPGA the flashing fails.
I have analysed the TMS
signals both through the FPGA and directly to the 10 pin header on the MCU and both look equally nosiy.
Would anyone know any properties of the FPGA that would contribute to this error.
Also could anybody suggestion a solution. Would latching the signal work and if so could anybody explain this in further detail.