I have to do a project involving a common emitter amplifier. The only given data is: the amplitude of the input signal is 100u, and offset voltage is 0.
I need that signal to be amplified. But my circuit won't amplify the signal, instead it will add offset voltage or even attenuate it.
What have i done wrong? Any ideas how to dimensionate the elements ( if that's the problem ) ?
Circuit was made in OrCAD Lite 16.6.
Start with large signal calculations for the bias, eg. collector current. I suggest something in the 100uA to 1mA rang for starters if you have no idea.
Yo want there to be some room for the collector voltage to swing around so your collector voltage should be somewhere near the middle of the emitter voltage and 5V.
You want the voltage across the emitter voltage to be large compared to Vbe for stability with temperature etc so maybe pick 1V, which means the collector voltage should be around 3V.
Since you know the current and you can assume Ic~=Ie you can can calculate R2 and R4.
For R1, R3 you want Ib * (R1||R3) to be << 1V so the beta has little effect but you also want them to be as high value as possible so as not to load the input. The ratio should be (5-1.7)/1.7 to give you 1.7V for the base (and thus 1V at the emitter).
Check that Xc << R1||R3 so the coupling cap is high enough.
You will find that the gain varies with your choice of Ic and the load resistance. Gain = gm * R2||R5
The only given data is: the amplitude of the input signal is 100u, and offset voltage is 0.
Wow. So I still see you using a \$5\:\textrm{V}\$ rail. That's kind of small and does put some constraints in here. Assuming you want to go through with that rail voltage and have no other ideas to add, then I'll add a few notes (the above starting point from you will be called "item #0" if I need to refer to it):
Ignoring minor details related to base current, as the \$\beta\$ isn't specified anyway, we can now compute \$R_E=\frac{V_{E_Q}}{I_{C_Q}}=1\:\textrm{k}\Omega\$, \$R_C=\frac{V_{CC}-V_{C_Q}}{I_{C_Q}}=1\:\textrm{k}\Omega\$.
Without an AC bypass capacitor, the voltage gain would be \$\vert A_V\vert=\frac{V_{CC}-V_{C_Q}}{V_{E_Q}}=\frac{R_C}{R_E}=1\$. This points up one of the serious problems with low voltage magnitudes between your supply rails. It's hard to get any gain without some additional compromises or struggles to get there.
In your case, you have a full AC bypass using a capacitor. This maximizes the gain. But now the gain depends on temp and also upon variations in collector current. You can compute the gain in this topology as roughly \$\vert A_V\vert=\frac{R_C\cdot I_{C_Q}}{V_T}\approx 38.5\$.
Given your input signal level of \$v_{in_{peak}}=100\:\mu\textrm{V}\$ this suggests about \$v_{out_{peak}}=3.85\:\textrm{mV}\$. This is small enough of a variation that I'm not worried about gain variation, since the collector current will only vary by about \$4\:\mu\textrm{A}\$ around its nominal value of \$1\:\textrm{mA}\$. That's a negligible variation and so I don't expect much distortion due to collector current changes when using the full AC bypass case. This helps confirm that your topology is fine to use here. It only leaves some gain change over ambient temperature changes.. but that's likely going to be under \$\pm 7\$% and it will be equilibrated out and won't move much in use.
At this point all you need to worry about is the biasing. You don't seem to care about the stiffness of the biasing pair. But in general the two resistors have around \$10\$% of \$I_{C_Q}\$ flowing through them. Since it really doesn't matter here, let's make it stiffer still and go with \$20\$%! That's \$200\:\mu\textrm{A}\$. You know the voltage you want at the base of the transistor as \$V_{B_Q}=1.7\:\textrm{V}\$. Can you work out the two resistor values to use?
(If you want to be fancy about it, you could estimate the base current as \$1\$% of \$I_{C_Q}\$ and allow for that part to be removed before it reaches the biasing resistor connected to ground -- so assume \$200\:\mu\textrm{A}\$ for the resistor connected to \$V_{CC}\$ and \$190\:\mu\textrm{A}\$ for the resistor connected to ground.)
You may get exact values for these resistors that aren't obtainable. So feel free to adjust the values to use standard resistor values. Just shoot for getting close. If the resulting base voltage seems a little higher, then this means that the emitter will be pulled up a little bit more, increasing \$I_{C_Q}\$ a little and thus pinching downward on \$V_{C_Q}\$. The opposite happens if you are a little bit under. Either way, you have some room to play with regarding \$V_{C_Q}\$ since your output voltage excursions are only a few millivolts. So it's not critical here. (You'll also see some changes in gain with changes in \$I_{C_Q}\$. But you probably don't care. So select reasonable standard values for your resistors.)
There will be a very minor adjustment you'll learn about for this amplifier design. I mentioned that you'd expect a gain of \$\vert A_V\vert=38.5\$, nominally. But it is likely closer to \$\vert A_V\vert=38\$ (a loss of a percent or two) due to the Early effect. But that's something you can worry about some other day.
What have i done wrong?
1) pick R1/R3 carefully so the transistor is correctly biased; or
2) self bias the transistor by connecting the upper-end of R1 to Q1's collectr; or
3) self bias the transistor by putting a diode (the same as Q1) in serial with R3; or
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