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Inspired by this post

Designing a *linear* MOSFET driver stage

I used this kind of driver for my controlled current source.

I use LTSpice for simulating and everything works fine until today :) when it happens that I put a long cable as (highly inductive) load. Digging the mess, I realized that if low frequency waveform (1KHz) with high slew rate (1uS rise/fall) will pass to my driver, very high peaks of current (and power) will appear on 2n3904 (3906) which are Q1, Q2 in my schematic.

Of course, I can change Q's to something bugger (~5W) but I'm just curiouse if this is the answer. I cannot slow down the wave form since it's comming from a 1uS settling DAC.

Even the peak pulses are narrow (1uS) I wonder how will perform this in real life (see attached image). As can be observed, very high peaks appears in simulation. Will be the drivers overloaded and burn?

I tried to limit the current by inserting R16 but this will limit the dynamic range and so, performances.

I forgot to mention, average power is only 14.693mW so appears to be fine. In real life would be needed bigger transistors?

Appreciate comments, thank you.

enter image description here

enter image description here

yo3hcv
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    There is probably *some* simulation effects going on here. Just look at the tops. I can't tell how narrow all that is, but have you tried to set the maximum simulation step downward to a very fine time step? (It should run kind of slow, then.) If you *still* see these effects, could you then tell us they didn't change. Or if you don't see them, could you update us with what you see now? Also, are you saying you cannot accept slew rate limits after the DAC? Do you really need such sharp edges? Finally, have you considered adding beads? – jonk Apr 30 '17 at 23:50
  • I don't have space to fully reply :) I will try with sim resolution. Yes, I need a ~2uS time step and DAC has 1uS settling. – yo3hcv May 01 '17 at 00:07

3 Answers3

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The power rating on transistors is typically for the continuous power. What you have here is 5W for 1μs, once every two milliseconds. This comes to 1μJ of energy going into your transistor every two milliseconds, which is an average power of half a milliwatt on top of whatever else is going on. So, based on energy alone you're probably fine--I'd be surprised if a 2N3904 burned out due to such low-energy peaks.

However, I can't seem to find any data on maximum pulsed current ratings. The 2N3904 is rated for 300mA continuous collector current, but it seems pulsed current isn't a standard figure of merit. I suspect that your transistors will be fine, unless that current pulse goes up to something ridiculous like 50A.

That's all assuming an unmodified circuit, though, and an accurate simulation. It's entirely possible, likely in fact, that parasitic elements that aren't simulated would stop this from even happening in the first place. And as @jonk says in the comments, if it is a problem, you can always slap a few ferrite beads on to spread the energy out over time, reducing the peaks.

Hearth
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  • Ok, got that. LtSpice have a nice feature for AVG power and I should check for relevant components. Where to insert FB's, on collectors to Vdd? – yo3hcv May 01 '17 at 00:05
  • Anywhere you see current spikes you want to get rid of. It's a relatively crude solution, but it gets the job done! – Hearth May 01 '17 at 00:07
  • Haha.. I'm ham radio but... indeed, should apply here too! Thanks both of you! – yo3hcv May 01 '17 at 00:09
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Assuming 5 watt energy rate, with duration 1uS, into silicon, we can compute the rise in temperature. In 1uS, the thermal depth (distance, if lateral) is near 10 microns.

Assume bipolar volume (the collector volume, where heat is generated) is 10U deep by 50U by 50U, or 25,000 cubic microns. Using 1.6 picoCoulombs per cubic micron per degree Centigrade, the specific heat for silicon, and multiplying, the specific heat for 10*50*50 is 40 nanoJoules per degree.

We have 5 joules per second, for 1uS, or 5microJoules. Lets divide. Delta Temperature is 5uJ / (0.04uj per degree C) = 5 * 25 = 125 degree Cent rise.

Per pulse.

analogsystemsrf
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  • What a calculation! Thank you, I have to study a bit :). BTW, seems that in my original design, when a (infinite) current source will drop voltage under normal levels (say 1V instead of normally 40V), my drivers quickly become overloaded. The BD243 will survive since is a 65W device and worst case will be ~22W. But one of the 2N3904 will dissipate (average) 1.2W which is too much. I replace them by BCX53, 56 and I add a good old fashion FOLDBACK protection for them. Just perfect. Thanks all for comments! – yo3hcv May 01 '17 at 12:03
  • 2N3904 would go poof in second-breakdown. See my answer for your real problem. – bobflux Aug 29 '17 at 16:03
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Your problem seems to be the inductive load.

Your circuit tries to quickly increase the current into an inductor, however the inductor limits the rate of current change.

If you want to quickly step the current into an inductor, then you will need to apply enough voltage (v = L di/dt).

Now, your circuit doesn't know about the load current, as the feedback is based on the voltage on R1=10R resistor. When the input steps, the feedback attempts to increase the voltage on R1, so it increases base voltage on Q1, which drives Q5, probably into saturation.

The inductor current has changed very little by then. But your circuit found out that by driving enough current into Q5's base and pushing it into saturation, it will get the voltage you're asking for on the 10R resistor, because Q5's base current ends up into R1.

So the circuit does just that.

Please give more info about the load, its impedance, cables used etc.

bobflux
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