How close can the uC's power pin (TQFP pad) and a ceramic cap's PTH pin can get so the PCB fabrication process or later exploitation would not go wrong? Some ballpark figures for common equipment available in most fabrication houses are desired. uC is going to draw current from a 3.3 V rail.
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3Is depending of the the voltage on the uC's power pin see in the Printed Board Design standards such IPC-2221A – R Djorane Mar 14 '17 at 14:06
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Is your question "go wrong" referring to electrical safety, or to the manufacturing process? I can't tell you how well the manual solder people can solder... that's something you have to ask them. – Marcus Müller Mar 14 '17 at 14:07
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@MarcusMüller edited and - now going through IPC-2221A. – kellogs Mar 14 '17 at 14:37
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1Why don't you use SMD capacitors? – Leon Heller Mar 14 '17 at 14:37
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@LeonHeller Good idea, but I am the one who is going to do the hand soldering :) – kellogs Mar 14 '17 at 14:38
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@kellogs With a bit of practice and a friendly package size (0805/0603) they're not really harder than through hole, but perform better. I usually find it quicker to solder a board of surface mount than through hole parts now. Less turning it over and clipping things. – Colin Mar 14 '17 at 14:43
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@RDjorane according to the IPC-2221A standard, paragraph 8.1.8, it seems my clearance would be 0.75 mm. This looks like a no problem figure for today's fab houses, so I am happy with that. You may want to turn it into an answer as well. Thanks! – kellogs Mar 14 '17 at 14:54
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Is just a small comment not an answer – R Djorane Mar 14 '17 at 14:57