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ive been trying to create this small circuit but its not working. The truth table should be that of a NAND gate, but instead i get this:

A|B|Q
0 0 1
1 0 1
0 1 0
1 1 0

I've put up the circuit in falstad.com/circuit/circuitjs.html ,tested it , and it came out the same! Why is this happening? I don't understand. Im attaching the text file for the circuit and an image below.

Circuit

CircuitJS file: http://pastebin.com/Cy7xWG1t

Andrew
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Moomba
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  • @MichaelGeorge, I don't think you've read the question. The truth table is correct. It describes this circuit's behaviour. – TonyM Jan 10 '17 at 22:11

3 Answers3

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The problem with your circuit is that the Base-Emitter junction of a bipolar transistor acts like a diode, so when switch A is off and switch B is on you effectively have this:-

schematic

simulate this circuit – Schematic created using CircuitLab

The obvious solution is to increase the value of R2, preventing Q3 from being turned on by current injected into the Base of Q2. However if you make the resistance too large then it will drop too much voltage and the voltage across R3 may be too low to turn Q3 on when switch A and B are both on.

A good transistor should have a current gain of 100 or more, so it only needs ~10uA Base current to switch 1mA from Collector to Emitter (producing 5V across a 5k load resistor). Changing the value of R2 to 100kΩ would limit the voltage drop across it to 1V at 10uA. Q2 Base-Emitter also drops ~0.6V which leaves 3.4V across R3, still plenty enough voltage to turn Q3 on.

When switch A is off Q2's Collector is effectively disconnected so it cannot amplify the current, and the voltage across R3 drops to 0.21V because R2 limits the current to (5V-0.6V)/(100k+5.1k) = 42uA. Q3 needs at least 0.6V to turn on so it will stay off - exactly what you need!

Bruce Abbott
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  • Well spotted and explained, showing that BJTs cannot just be substituted for the FETs in the traditional logic circuits. – TonyM Jan 10 '17 at 22:13
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Check your logic with the schematic.

Only the lower of the pair (B) is needed to pull up the emitter. using the Vbe(B) as a diode to switch ON the output low.

Then see where the change is needed to gate both currents of A & B inputs. (hint wrong node and R location)

Tony Stewart EE75
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1

Try the following, instead:

schematic

simulate this circuit – Schematic created using CircuitLab

(I've also assumed \$V_{CC}=+5\:\textrm{V}\$ as the voltage source here.)

I really don't know why teaching materials keep using these paired BJTs for NAND and NOR gates. They need to either be even more complex to teach things correctly or else simpler (as above.) But instead, some seem to imagine that they teach something useful by providing a bad analog circuit for digital use.

Let's examine the circuit in the case that isn't working for you:

schematic

simulate this circuit

Note that the emitter of \$Q_1\$ is at around \$0\:\textrm{V}\$. That's because it can't be a negative voltage as there is no source for that. (It will be higher, as we'll see shortly.) As there is nearly zero current in \$Q_1\$'s base, the emitter will be roughly the same as the base (which, of course, is \$0\:\textrm{V}\$.) But this also means that \$Q_2\$'s collector is sitting close to \$0\:\textrm{V}\$, too. And this forward-biases \$V_{BC_2}\$ (of \$Q_2\$.) So \$Q_2\$ is about as fully saturated as it is possible to be. (This will place the emitter of \$Q_1\$ at the same voltage as the collector of \$Q_2\$, which will be computed shortly below when I compute \$Q_2\$'s emitter voltage.) Roughly speaking then, almost all the base current in \$Q_2\$ becomes collector current for \$Q_2\$. And this means that the emitter current is something like:

$$I_{E_2}=\frac{V_{CC}-V_{BE_2}}{R_2+R_3}$$

Assuming \$V_{BE_2}=700\:\textrm{mV}\$, I get about \$303\:\mu\textrm{A}\$. Sinking that into \$R_3\$, I get an output voltage of about \$1.55\:\textrm{V}\$.

(Given that collector/emitter current level, I'd expect about \$60\:\textrm{mV}\$ less, or \$V_{BE_2}=640\:\textrm{mV}\$, in a small signal device. That would raise the emitter current to about \$307\:\mu\textrm{A}\$ and the resulting output voltage to \$1.57\:\textrm{V}\$. A minor adjustment.)

Rounding that, the circuit outputs around \$1.6\:\textrm{V}\$ on the \$Q\$ output, which of course is enough to activate your output transistor and thereby turn off the LED. (This will also be, accounting for a very slight \$V_{CE_2}\$ voltage difference, the collector voltage of \$Q_2\$ and therefore the emitter voltage of \$Q_1\$.)

If you ignore analog electronics and just imagine the transistors as some kind of digital ON/OFF device, then the circuit probably makes sense. But thinking that way is pure fantasy and not reality.

Correctly functioning digital circuits are created out of an understanding of analog reality. You can simplify concepts up to a point. But not past that point, to where the simplification results in a gross distortion.

jonk
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    I don't get this part: "Note that the emitter of Q1 is at around 0V.... it can't be higher than the base". Why do you think the emitter voltage can't be higher than the base voltage? And where can the Ic current go in your picture? LTspice gives about 1.3 volts at Q1's emitter in this case, so I think 0V is wrong. – Ken Shirriff Jan 10 '17 at 22:46
  • @KenShirriff Thanks for catching that mistake. It can be higher (and will be.) I wasn't thinking closely when I wrote that and actually meant something slightly different. I'll correct my statement and include the reason why you get what you got. – jonk Jan 10 '17 at 23:05
  • @jonk This clarified a lot of things. I originally wanted to chain multiple logic gates like that and create a basic binary adder, but i don't think thats possible right now with my knowledge. What would you suggest to pick up if i want to learn this kind of stuff? – Moomba Jan 12 '17 at 18:51
  • @Moomba To start, see my reply here: http://electronics.stackexchange.com/questions/265567/building-a-full-adder-with-npn-bjt-transistors/265591#265591 – jonk Jan 12 '17 at 19:09