1

I need to build a fast level converter, 5 V in -> 12 V out using transistors.

I've seen Voltage level shifter, but it drives the output high using a resistor pull-up, and it's slow....

I have a 100-1000 pF load and need some 15-100 ns fronts.

How should this be done?

I have both +12 V and +5 V power rails.

Null
  • 7,448
  • 17
  • 36
  • 48
BarsMonster
  • 3,267
  • 4
  • 45
  • 79

3 Answers3

3

I need to build fast level converter, 5 V in -> 12 V out ...

I have a 100-1000 pF load and need some 15-100 ns fronts.

Both those requirements sound like MOSFET drivers. It's going to be extremely hard (not out of the question, but difficult) to do this with discrete transistors. If I had your requirements I'd look at low-side MOSFET drivers like the MIC4426 or FAN3111E.

Null
  • 7,448
  • 17
  • 36
  • 48
Jason S
  • 13,950
  • 3
  • 41
  • 68
2

Consider a two stage solution using an open-drain inverter or comparator followed by a CMOS inverter.

The first stage could either be built with either a discrete transistor or an open-drain logic device. In either case, the rise time will be limited by the RC combination of the pull-up resistor and the load capacitance. With a fairly low-valued pull-up resistor, like say 2 kOhms, and a 15 pF load (for the next-stage chip I'll suggest below), you'd have a 30 ns time constant on the rising edge, which is reasonably within your specs.

For the second stage, the old-school CMOS CD4069 operates at up to 18 V, and has propagation delay of 30-60 ns and rise/fall times of 50-100 ns when operating at 10 V (improving for higher voltage).

It's not clear from your question if the 15 - 100 ns "fronts" you specify is for the rise time or the propagation delay. With this combination you meet the requirement for rise time; but may be near the limit for propagation delay -- you might have to adjust the pull-up resistor for the first stage to trade off power consumption vs delay.

After thinking about this some more, I realized this solution will probably not be fast enough to meet your specs, because the CD4069 rise-time spec is based on a 50 pF load. With 1000 pF load you are not likely to see 100 ns risetimes -- 1 us seems more likely.

An alternative may be to construct your own CMOS inverter from discrete FETs or a complementary pair like NTJD4158C. The benefit of using discretes is you will be able to simulate the performance of your switch and be sure it will give the rise/fall times and propagation delays you need before you build it.

Null
  • 7,448
  • 17
  • 36
  • 48
The Photon
  • 126,425
  • 3
  • 159
  • 304
  • @BarsMonster, See edit--proposed solution is probably not fast enough for you. Feel free to de-accept my answer and see if a better answer comes along. – The Photon Mar 11 '12 at 16:01
0

For that speed I think you'd need a MOS transistor, surely not a BJT (NPN or PNP). I don't know about other families of JFET and so on, but "small" MOS transistors should work well.

Regarding the level converter, if I understood you correctly, you want to have a device which converts a logical 1 (5V) into a logical 1 (12V).

If you have access to a separate power source (which can be of course be 5V), I'd just do a simple boost converter to make 12V out of 5V (you will need a capacitor, inductor, [schotty] diode and one MOS transistor preferrably), then use the logic signal 5V to command the MOS from its gate. The MOS will then have its source connnected to the output of the boost converter (12V), while you'll get the desired output from its drain. In this example you will need a PMOS. There are of course many alternatives using the NMOS since they're "better", but can be a little trickier to command.

Beware that using a boost converter can be tricky and you should always provide have a feedback system to control the output voltage so that it does not explode. There should exist some IC which do all the above.

user51166
  • 860
  • 3
  • 10
  • 21
  • Wait-wait-wait. If source of PMOS is connected to +12V, and gate to +5 or 0, it will be always CLOSED. I don't need boost converter, I have both +12 and +5 power rails (updated description). – BarsMonster Mar 10 '12 at 12:17
  • Mmm ... for an NMOS you have VGS>0 if you want to have it in conduction/linear or saturation. Since PMOS work in reverse with respect to NMOS, if you want to conduct you have VGS<0 which is what you have. However you're right, as this won't work, since in fact it will always conduct. Why not then use a comparator made out of MOSFET ? Just search for a comparator which works with 12V and is fast enough for your application. That would be the simplest solution (just put a reference on something like 2V). – user51166 Mar 10 '12 at 12:42
  • 1
    However comparators usually use pull-up resistors as well, though they seem fast (see for instance LMH7220MK of National Semiconductors, just to pick one). The problem is, as you said, that you cannot solve this problem with just one transistor. An alternative would be to build yourself a differential pair and use it with positive feedback, so that it works as a comparator. That may be tricky as well though. – user51166 Mar 10 '12 at 12:57