Capacitor emplacement during routing

Question

I'm actually designing a circuit with decoupling capacitor. I'm done with the schematic and now I'm working on the routing.

Here come the question :

In schematic you can put the capacitor anywhere between the supply line and the ground. While in routing the capacitor have be as close as possible to the chip. Is there any more requirement? For exemple :

^{simulate this circuit – Schematic created using CircuitLab}

Please, look at it as if it was a layout. Is there any difference if the decoupling capacitor is before or after the IC? Normally these two circuits will have the same behavior but I got a doubt.'

Don't hesitate to comment if I wasn't clear enough. Thanks :)

Answer 1

On the PCB layout, decoupling capacitors are normally placed in close proximity to the power pins of ICs. This allows local current transients to be evened out without disrupting current paths elsewhere on the board.

Other capacitors intended for general "bulk smoothing" can and should be distributed across the board where feasible. These techniques are generally good practice in most applications.

A well drafted schematic will include annotations clearly indicating where there are special requirements for part placement in relation to other parts.

Often decoupling caps for digital ICs are all grouped together and designated as "decoupling for IC1", "decoupling for IC2" and so on. Doing it this way keeps a complex design with many ICs from becoming untidy due to the large number of decouplers that accompany the ICs.

So, on the schematic it really doesn't matter where the caps go as long as they are attached to the correct nets.

Answer 2

You asked a broad question, and many factors come into play.

First, you need to understand why capacitor takes place, and what, from physics point of view, happens to all components involved.

In your example decoupling capacitor "protects" U1 chip from noise generated by the power supply and other components connected to power rails. And, at the same time, it protects other components from noise generated by the operation of U1.

Your task, as designer of the circuit and layout, to ensure as many components as possible are protected from interference. In simple, low frequency circuits like yours, having only two components, it may not matter where you place cap to, but I would anyway recommend to place it "before" the chip, or exactly between its pins if possible. In more complex and sophisticated circuits you may place capacitors between pins, or between integrated circuits - this all depends on noise frequency which could be generated by operation of the IC (or any other component) and possible interference between these components.

And last, but not least. Be careful putting decoupling capacitors with large difference in their values close to each other. I did not experience it yet :) but I heard that in unfavorable situations capacitors and board may form oscillation circuit which may affect power quality badly.

Answer 3

In the schematic there will be no difference, other than clarity of how you intend to connect your capacitors in your layout.

Anyhow, if you have special requirements regarding decoupling or bypassing, you should specify so with a brief written note in your schematics.

Actually, the best way to place your capacitor in your schematics is the one that helps most with readability regarding what your circuit does. Meaning that in your example circuit 1 is much clearer to me, as I clearly see that the capacitor is intended four decoupling.

For more information about how to place your capacitor in your layout (once you start the next step), consider also reading this post about decoupling capacitors.