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I'm trying to figure out a way to use the Power Good outputs of several stages of voltage regulators to sequence and monitor a board powering several FPGAs. I've done this easily before with a microcontroller, but this is not allowed (!) in this design.

I have setup a primitive sequencing scheme with RC-delays and comparators which turns on the regulators in order. The problem here is I need to monitor several Power Good pins which are tied together.

As I understand it the Power Good pins are open drain pins which are pulled to ground if VOUT of the regulator is below (or over) a certain level. Unfortunately (and obviously) they don't pull to ground if there is no input voltage present at the regulator input. So the input to the comparator needs to be pulled up, possible to parallell and only assert when all Power Good pins are OK.

My current idea of solving this is the below transistor circuit: When the first regulator turns on, its VOUT pulls the PG pin which should be low until VOUT is OK. The transistors connected to the PG pin are set up so they ground the line which is paralleled to other regulators PG during the startup, and releases the global PG only when the regulator PG is OK. When all Power Goods are released this will trigger the enable pins of the next stage of regulators.

Will it work?

enter image description here

schematic

simulate this circuit – Schematic created using CircuitLab

Kevin Reid
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Dejvid_no1
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    Is it only my browser or is it almost impossible to see what's on the schematic? – Dejvid_no1 Sep 13 '16 at 21:03
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    its only your browser, for me its not almost impossible, its totally impossible. – PlasmaHH Sep 13 '16 at 21:22
  • :( Tried it in Explorer with the same crappy results. But it is at least possible to open it via the "Simulate this circuit" link. – Dejvid_no1 Sep 13 '16 at 21:26
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    you might be able to condense the layout a bit so everything gets bigger, relatively. – PlasmaHH Sep 13 '16 at 21:27
  • [Here](http://meta.electronics.stackexchange.com/a/5829/91862) is a relevant answer on meta. – pipe Sep 13 '16 at 21:58
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    Looks like it should work. Consider adding something to discharge C1 quickly when main power is off. The simplest would be a diode from C1 to 3.3V. – rioraxe Sep 14 '16 at 00:29
  • Isn't the PG output already tied in some way to VOUT of the regulator. For example, as in this PG circuit with hysteresis: https://www.circuitlab.com/circuit/hsjstj/pg-example-01/ (If it is, then adding a 10k may change its intended behavior.) Do you know what the PG circuit actually is in the regulator? – jonk Sep 14 '16 at 07:12
  • @jonk The datasheet for Linear LTM4644 and other regulators I plan to use says that the PG pin is "open drain logic" pulled to GND when not OK. It also says that it should be used with a pullup. I had an FAE over yesterday who also said the same thing. It is tied to VIN in some way though, for powering the pins transistor. – Dejvid_no1 Sep 14 '16 at 07:51
  • Thanks. I'm mostly thinking about the case where the input voltage itself hasn't yet powered up (each, individually) and I'm wondering what the circuit actually looks like (did they build in hysteresis, and how, etc) and how it behaves when it doesn't have a solid rail of any kind to work with. What does it actually do while the input is rising (slowly in my mind) from ground? – jonk Sep 14 '16 at 08:00
  • My expectation would be that the PG output is pulled to GND while Vin is zero, because otherwise it would glitch during power-up. So tying the PG outputs of a stage together with a pull-up resistor (to Vin) should give a good enable signal for the next stage. – Simon Richter Mar 02 '19 at 18:06

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Rather than build your own discrete solution out of transistors, I'd highly recommend using a reset / supervisor IC for this. I used that approach when I had to solve this exact same problem on a design in the past. They do the exact job you're trying to do here -- wait for voltage to stabilize, then release the /RESET signal after a fixed amount of time. Just hook that supervisor IC up to the regulator's output, and use its /RESET output as the ENABLE input to the downstream regulator.

They're tiny and cheap -- I'll wager a smaller and cheaper solution than a discrete circuit. A few examples:

Some SOT-23s from ST

TPS3836 from TI

Mr. Snrub
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