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I am studying digital electronics. A book says that "use a 0.1 μF capacitor between Vcc and ground for each IC".

What does this mean?

Why can a capacitor protect CMOS chips?

Does it mean that a capacitor should be added like in the figure?

update (7/21/2016): okay, maybe I was confused with the meaning. A chapter of the book was talking about static protection for CMOS chips and for an experiment it mentioned the quotation with a footnote. The footnote says, "In keeping with standard practice, capacitors are specified, particularly with CMOS devices, to return switching current 'spikes' to the source through the shortest possible path"

So, I thought a capacitor should be used to "PROTECT" CMOS chips.

As I said, I am studying digital electronics. I don't know about decoupling capacitors. So still I don't know if my question is duplicate :(

schematic

simulate this circuit – Schematic created using CircuitLab

Heigenberg HP
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    100 nF and 100mF are very different things! – Eric Jul 21 '16 at 00:01
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    (a) As mentioned in answers, the terms for you to research are "bypass capacitor" & "decoupling capacitor". (b) This basics of this topic have been covered extensively in previous questions e.g. ["What is a decoupling capacitor and how do I know if I need one?"](http://electronics.stackexchange.com/questions/2272/what-is-a-decoupling-capacitor-and-how-do-i-know-if-i-need-one) so this topic seems to be a duplicate of that (or other similar questions). (c) Physical location of decoupling capacitors is important (and also covered in previous questions). – SamGibson Jul 21 '16 at 00:04
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    The word 'protect' does not appear in your quotation. You're jumping to conclusions. Don't do that. – user207421 Jul 21 '16 at 02:25
  • @EJP I suppose (hope?) the OP read the term "protect" in another passage of that book. If that's not the case, he actually jumped to conclusions and the question may well be a duplicate. On the other hand, if the book actually stated, in a way or another, that the cap *protects* the IC and didn't use the term "bypass" or "decoupling", the OP can legitimately be confused (lots of sloppy books out there, sadly). – LorenzoDonati4Ukraine-OnStrike Jul 21 '16 at 07:07
  • @SamGibson please, see my previous comment in reply to EJP (why the xyz the platform doesn't allow at least a couple of commenters to be notified!?!?). – LorenzoDonati4Ukraine-OnStrike Jul 21 '16 at 07:08
  • @Eric I suspect (I hope!) a typo there (fat fingers?!) – LorenzoDonati4Ukraine-OnStrike Jul 21 '16 at 07:10
  • A cap is used because of dynamic loading, and inductance/resistance of traces and wires, plus the fact that power supplies dont regulate power instantaneously – Voltage Spike Jul 21 '16 at 17:09

2 Answers2

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That's not a protection device, if you intend "protection" as something that prevents the chip to die, but it serves as a so-called bypass capacitor.

It acts as a reservoir of energy whenever the chip draws pulses of current when switching occurs. If the power rails were truly ideal connections, with no resistance nor inductance, bypass caps wouldn't be necessary.

Since the rails have some resistance, whenever the chip absorbs a sudden pulse of current, a corresponding voltage drop develops along the rail, risking to bring the rail voltage out of specs. The bypass capacitor reduces this risk in a way similar a filter capacitor after a bridge rectifier reduces the ripple of a rectified voltage.

In other words, bypass caps help keep the voltage of the power rail constant at the chip terminals, which is what is needed for its correct operation.

Note that bypass caps need to be placed near the IC they are meant to "protect", in order to be effective. Here "near" means that between the terminals of the cap and those of the chip there must be the least distance possible along the copper traces, in order to minimize the resistance (and the inductance as well) that is not bypassed.

Dave Jones, of EEVblog fame, has made a nice tutorial about bypass capacitors (EEVblog #859).

EDIT (prompted by a comment by Floris)

In the explanation above I focused on the voltage drop caused by the resistance of the rails because it is the easier to understand, especially for a newbie. To avoid giving a false impression, though, I must emphasize that the resistive effects are not the principal cause of voltage drop during current spikes. The principal culprit is the inductance of the rails, especially in high performance circuits, where switching is very fast. In fact, an inductor of inductance L presents a reactance \$X_L = 2\pi f L\$ (if you don't know what I'm talking about, see it as a sort of "AC resistance") that is proportional to the frequency. Therefore current spikes with higher frequency components (i.e. having steeper edges) will cause a more substantial voltage drop.

LorenzoDonati4Ukraine-OnStrike
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  • Thank you very much, Lorenzo. It helps a lot for me to understand my question. So if a proper capacitor is used to each COMS chip, it protects the chips. or at least capacitors help CMOS chips work properly. As mentioned in the update, the textbook was talking about static damage in CMOS devices. So I thought a capacitor can be a protection part for a CMOS chip. Do I understand correctly? – Heigenberg HP Jul 21 '16 at 21:36
  • @HeigenbergHP I find very strange the terminology the book is using. You mention "static protection". Do the book use really that exact expression? Usually when we use the term "static" and "protection" in the same sentence, especially in the context of CMOS devices, we mean something related to Electro-Static Discharge (ESD) protection of CMOS inputs, which is usually accomplished (in modern devices) through internal protection diodes connected from the input pin to the rails. Bypass capacitors have little to do with ESD protection. – LorenzoDonati4Ukraine-OnStrike Jul 21 '16 at 22:29
  • probably that's why I was so confused. here's the textbook says " the circuits constructed in this experiment use COMS logic. You should use static protection to prevent damage to your ICs" – Heigenberg HP Jul 21 '16 at 22:57
  • @HeigenbergHP Modern CMOS ICs, even of the now "ancient" 4000 series, have embedded ESD protection circuitry, so it is usually not necessary to use particular precautions handling them, especially if you are just toying around with them in a didactic lab. Just avoid touching their terminals if the room humidity is very low and you tend to generate "sparks" due to synthetic/woolen clothes, just to be on the safe side. – LorenzoDonati4Ukraine-OnStrike Jul 21 '16 at 23:07
  • @HeigenbergHP, of course, since ESD events can degrade permanently the performance of a chip, in an industrial/professional environment, where reliability is paramount, you would wear an antistatic wristband connected to earth ground to avoid any potential issue. – LorenzoDonati4Ukraine-OnStrike Jul 21 '16 at 23:09
  • Now I understand. ESD protection and bypass capacitors are different. I think this post should not be deleted for future dummies like me. The book used the two terms on a page. it was so confusing. – Heigenberg HP Jul 21 '16 at 23:15
  • @HeigenbergHP Don't worry! It won't be deleted. Marking a post as a duplicate is not a mark of shame! It is the way a network of related question is built here on EE.SE and in all SE sites. If your question were so bad, it would have been downvoted to oblivion and closed for being off-topic or something like that. As it stands it shows research effort and willingness to understand. So that's good. – LorenzoDonati4Ukraine-OnStrike Jul 21 '16 at 23:18
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    "_Since the rails have some resistance_" -- It is the inductance, not the resistance, of the supply lines that is the problem. That is why there can be a large transient dip in voltage as the CMOS device switches - and that is what the cap prevents. It has to be mounted very close to the device for that reason - one per chip, short leads. – Floris Jul 23 '16 at 10:00
  • @Floris since the OP is clearly a student with unknown (possibly low) level of expertise, I focused only on resistance, whose effect is simpler to understand. If you reread my post carefully, I also mentioned inductance in two points "..no resistance nor inductance..." and "...(and the inductance as well)...". Moreover I also provided a link to a video in which inductive effects are clearly mentioned as well. – LorenzoDonati4Ukraine-OnStrike Jul 23 '16 at 17:31
  • @LorenzoDonati - on the whole your post is accurate and to the point, and I did see a mention of inductance lower down - I just felt that you should have mentioned it in the same breath as resistance in the phrase I quoted, as that is what gives rise to the large voltage drops during CMOS switching. Peace. – Floris Jul 23 '16 at 17:35
  • @Floris. Ah! Ok. No problem. I thought you read the post hastily. As I said, my focus on resistance was deliberate, but I could actually improve my answer adding a paragraph to highlight the relevance of inductance in the phenomenon. – LorenzoDonati4Ukraine-OnStrike Jul 23 '16 at 17:41
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    That's the point I was making. I was encouraging you to make this a truly valuable answer. You might even consider (to make this good for "future readers" who might have a different level than OP) to include an analysis of the behavior of the decoupled capacitor in series with an inductor. But that might be stretching it. – Floris Jul 23 '16 at 17:42
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These are called decoupling caps. The purpose is not to protect the IC, but to supply the local current when the chip switches keeping the supply from dipping due to stray inductance and resistance in the supply line (From the supply and ground source to the Vdd and ground of the part).

John D
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