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Intel and IMEC came up with multigate MOSFET designs with channels as narrow as new nanometers. Which methods/techniques/machines are used to pattern/fabricate such small features?

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Sparkler
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  • https://cmi.epfl.ch/metrology/files/Nova600/John_Melngailis/Lecture1.pdf FIB's or Electron beams are good starting points :) –  Jun 20 '16 at 04:07
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    FIB and E-Beam, that is nonsense, FIB and Electron beams methods are not used for producing chips they're used for making test-modifications and inversitgations, not for productions. – Bimpelrekkie Jun 20 '16 at 07:29

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The way that these structures are fabricated is mentioned in the article. It is basically a "conventional bulk FinFET flow" with an added STI and "a low-complexity ground plane doping". That sounds to me more like a change in recipe than a change in manufacturing methods.

So these structures are made in the same way as most modern chips are made. They cannot use something much different as that would make it very expensive to implement in the IC manufacturing processes. If IMEC would propose too radical changes, no manufacturer would use it.

Bimpelrekkie
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