I (incorrectly*) modeled this simple answer in LTspice IV and am seeing seemingly random instantenous voltage spikes up to +/-1kV on the output of the depletion nMOSFET. Are these real?
If so, are they significant, and if so what standard practices are missing in this design to control them?
* Here is the correct model and output, which exhibits no voltage spikes. (But I believe the question on the original circuit is still valid.)
The significance that I usually associate depends on the magnitude of the voltage. I think a good measure of how suspicious/skeptical you should be is how many multiples of the expected value you see (and how many ideal components you use).
An extremely relevant quote that applies to modeling is
"Everything should be made as simple as possible, but not simpler."
With ideal circuit elements, it is easy to omit a lot of the parasitic effects in a circuit, such as capacitance, inductance and resistance. Ideal models may not switch operating modes smoothly, and abrupt transitions/discontinuities are also sources of more weird solver behavior. Another thing not handled well is multiple high impedance devices in a voltage divider. Another gotcha is operating a model outside its characterized region.
Beware of simulating circuits you don't understand, as you may not understand the expected behavior or be able to spot when it's misbehaving.
