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I read about Static Hazard. We know Static 1-hazard is: Input change causes output to go from 1 to 0 to 1.

My note covers a Circuit as follows:

enter image description here

My notes says: When B=C=D=1, for any changes in A values, it's probable to have Static Hazard 1.

But I think:

for 1 to 0 transition of A static hazard 1 can be observed. for 0 to

1 transition of A no hazard can be observed.

anyone could describe my sentence is correct or my note say the correct sentence. which of them is correct ? why? Thanks.

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Michle Sipser
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  • F is going to be 1 continuously, except maybe during transitions on A, in which case you have a race situation. What are you trying to do with this circuit? – user1582568 Feb 11 '16 at 18:02
  • I think either transition could be equally susceptible to the glitch caused by the race condition as you have one input to the final gate transitioning 0 to 1 while another transitions 1 to 0. Can you say why you do not believe the 0 to 1 transition of A is a problem? – user1582568 Feb 11 '16 at 18:06
  • @user1582568 would you please describe more for me? I think this is not obvious for me. – Michle Sipser Feb 11 '16 at 18:07
  • @user1582568 I Think Let the initial input be A=B=C=D=1, then P=Q=1, R = 0 and F = 1. I need more description – Michle Sipser Feb 11 '16 at 18:08
  • I don't know what P and Q are. The output of the top gate will be A. The output of the middle gate will be 1 always. The output of the bottom gate will be 'A (inverse of A). The right hand gate will always have a zero going in so will always have a 1 going out. As A changes, if the right hand gate responds to the high going transition first it will glitch low, as it will breifly see 3 1's at its inputs. – user1582568 Feb 11 '16 at 18:17

1 Answers1

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The output of the top gate will be A. The output of the middle gate will be 1 (as it has a zero at one input). The output of the bottom gate will be 'A (inverse of A). The right hand gate will always have a zero going in so will always have a 1 going out. As A changes, if the right hand gate responds to the high going transition first it will glitch low, as it will briefly see 3 1's at its inputs.

The following chart shows the logic signals as A goes 0 to 1 to 0

enter image description here

user1582568
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  • If I called the output of first row gate P, second row Q and third row R, can I say: If at time t=0, the value of A and A' are toggled, then at t=δ2 seconds, P=Q=1 and R=1 which will force F = 0 then at t=δ1 seconds, P=0 and Q=R=1 which will force F = 1 According to the logic the circuit's output should remain always at 1. But the output momentarily changes to 0 (for δ1−δ2 seconds) and then comes back to 1. And this is called static-1-hazard. – Michle Sipser Feb 11 '16 at 18:44
  • Yes, and this can happen on either transition. It will depend of whether there are any delays between the transition on A and 'A, and on the relative propagation delays (and threshold voltages) of the gates. – user1582568 Feb 11 '16 at 18:51
  • Is it possible to describe reverse transition? Thanks – Michle Sipser Feb 11 '16 at 18:55
  • Both transitions of A are symmetrical, forget Q, it is always 1. P is A and R is 'A. The only thing that changes for the right hand gate is that one input (P or R) goes from 1 to 0 while the other (R or P) goes from 0 to 1. Either situation is the same. – user1582568 Feb 11 '16 at 19:02
  • Sorry. I think Misunderstand. I thing got it, but No. Is it possible to make it clearer in answer part? thanks. – Michle Sipser Feb 11 '16 at 19:23
  • many hours, I thinking. please learn it me :) – Michle Sipser Feb 11 '16 at 20:53
  • I think you understand, you summarized it correctly in your previous comment, the output should always be 1 for any static input state of A, but it may glitch to 0 when A makes a transition (high or low going). – user1582568 Feb 12 '16 at 09:48
  • I approve it. but would you please add how you conclude these for any change of A value? please learn me. please. I confused. is it possible? – Michle Sipser Feb 12 '16 at 10:17
  • @MichleSipser, hope this helps, see edit to answer. – user1582568 Feb 12 '16 at 11:24
  • Question marks mean Hazard am I right? – Michle Sipser Feb 12 '16 at 11:26
  • Question marks mean the value is not determinable, could be high or low, so yes there is a hazzard. – user1582568 Feb 12 '16 at 11:28