Could the beagle bone black receive input data from GPIO pins using PRU and then write it on the DDR3 RAM? It's known that you could use shared memory for this. But I wonder if it is also possible to use the 512MB DDR3 RAM.
(I assumed rev C)
Could the beagle bone black receive input data from GPIO pins using PRU and then write it on the DDR3 RAM? It's known that you could use shared memory for this. But I wonder if it is also possible to use the 512MB DDR3 RAM.
(I assumed rev C)
Yes.
The Technical Reference manual for the processor says that the PRU has "access to pins, events and all SoC resources" which suggests it can read and write to DDR3. Further on it in section 4.3.1.2 it discusses the local data memory map and states "The PRU accesses the external Host memory map through the Interface/OCP Master port (System OCP_HP0/1) starting at address 0x0008_0000". Which confirms it.