I have a penta-band GSM transciever on a 4-layer board, along with a matched chip antenna. Similar concept to EE.SX/questions/35836/how-do-components-on-a-ground-plane-of-monopole-pcb-antenna-effect-radiation-eff.
First few prototypes placed most discretes on the bottom side, and that worked well. Now I've optimized things and want to put most discretes on the top for DFM assembly.
Question is, even with a top side ground plane, how much trouble is this asking for?
Size is fairly small, 4x3 inches. If no (>\$\frac{\lambda}{10}\$) traces are exposed, is it much of a concern?
How is such a proposition approached? Are there any rules-of-thumb for "exposing" areas of ground plane to minimize RF induction in component leads?
Or grouping / separating to avoid critical lengths?
How about a vertical metal shield strip or fence, the same height as the chip antenna, soldered into the PCB some distance away?
Would that eliminate EMI concerns beyond the strip?