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I am thinking of automating my noise sensitive designs of high sensitivity in SMD: maintain 95% signal sensitivity by adjusting the factors (1-3) in the thread What is the best way to layout a PCB with crystal oscillators and MCU?

  1. Electric fields and especially their rate of change should be minimized. - - [M]aximize spacing between lines that swing their voltage rapidly Magnetic fields should be minimized.
  2. Magnetic fields are proportional to loop size and rate of change of current. - - [D]ecouple anything that has a high rate of current change (power conversion, IC power lines) with suitable capacitor values and you want to route power lines as closely together as possible to minimize the size of the current loops.
  3. High impedance means low noise immunity. Avoid high impedance lines, and if you have them, make them as unsusceptible to noise as possible. Shield them, guard them, but ideally just terminate them with a low impedance so you don't have to deal with it.

and

  1. Doing Little Filtering of the Signal at the low frequency bands, especially < 10 Hz, but signal target < 500 Hz.

Pseudo automation

  1. How to choose correct amount of layers to maintain 95% sensitivity of the signal?
  2. Simplify board by removing components which filter signal unncessarily.
  3. Estimates of factors (1), (2), (3) for the current designs.

Case Example

Let's consider Biosignal PI's Hat (one version of revision A) as an example. Assume it is a simple two-layered PCB having ADUM1000 isolated (black-purple stripes at the right-bottom corner) from other two ADUMs (ADUM4400ARWZ, ADUM6400ARIZ) where the latter ADUM is different than in the link's material list here.

enter image description here

which resistors and capacitors are (other components here with exception that ADUM6400ARIZ instead of ADUM6403ARIZ)

Qty   Value   Device  Package Parts on PCB
12    0.1uF   C-USC0805   C0805   C2, C3, C6, C7, C8, C13, C14, C15, C17, C18, C19, C21   CAPACITOR, American symbol
1 100K    R-US_R0805  R0805   R10 RESISTOR, American symbol
3 10uF    C-USC0805   C0805   C9, C12, C16    CAPACITOR, American symbol
2 15pF    C-USC0805   C0805   C4, C5  CAPACITOR, American symbol
1 2.2nF   C-USC0805   C0805   C1  CAPACITOR, American symbol
8 4.5k    R-US_R0805  R0805   R1, R3, R4, R5, R6, R7, R8, R9  RESISTOR, American symbol
3 4.7uF   C-USC0805   C0805   C10, C11, C20   CAPACITOR, American symbol
1 40K R-US_R0805  R0805   R13 RESISTOR, American symbol
1 4M  R-US_R0805  R0805   R11 RESISTOR, American symbol
8 500 R-US_R0805  R0805   R2, R12, R14, R15, R16, R17, R18, R19   RESISTOR, American symbol
3 5K  R-US_R0805  R0805   R20, R21, R22

My comments

  • About 80% sensitivity of the output signal in the current design.
  • R20 has different resistance (4.7 \micro\ohm) than C14, C16, C18 and C21 (0.1 \micro\ohm), which is not a good thing because error-prone design.
  • Some expensive capacitors (10 \micro F and 4.7 \micro F) as I started to discuss about them in the thread Replace Tight Capacitors for Better Tolerance?
  • I do not understand which frequency bands the capacitors (10 \micro F and 4.7 \micro F) remove. TODO
  • I am afraid if the two-layers are enough to maintain high sensitive signal.

How can you automate the noise sensitive designs of SMD with only little filtering for 95% Signal Sensitivity?

Community
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Léo Léopold Hertz 준영
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    Hmm, in my experience the *noise sensitive* parts are done **by hand** by an experienced engineer. Also before you can automate anything, you would have to come up with rules/procedures that need to be applied. The list you have are "high level" constraints, it will be difficult to automate these in my opinion. You would first need to have an idea what your ideal design should look like. – Bimpelrekkie Feb 04 '16 at 16:09
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    @FakeMoustache I see your difficult, and raise you impossible with current tools. – Matt Young Feb 04 '16 at 16:09

1 Answers1

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This is doable, because a human can do it. The short of it is, however, that you can not write the automation process without a full picture. Automating those three rules is worthless without other rules.

If you gave it rule two for example, you might get a board where every power line is clumped in the center and some MEMs sensors are off on the side of the board. This would be bad for completely different reasons concerning board vibration. I see what you're saying about caring for the two hardest portions (power and clock), but without knowing the shortest path of every IO, which IOs are more sensitive to the power, which IOs radiate more towards the clock, you just can't automate this.

Now if you go and do all those exercises then you need a scripts which take them into account, gives a weighting algorithm (or something) for highest risk lines, and then places between X line. Then we get into a script that runs a calculation on parasitics and noise in neighboring lines. If you do this and have the distances auto adjust or add shielding then you have replicated $10,000 software which a lot of people spent a lot of time on.

I say this not to discourage, because I love the idea of automation (open source). I say this to let you know the tools are out there and this is doable, but complicated. Best of luck in this and if you are taking a stab, go at it step by step. There's no right starting place but knowledge.

mcmiln
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