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I'm using TI's PGA chip PGA204. It has a DGND and an AGND. And it states:

Digital ground can be connected to any potential from the V– power supply to 4V less than V+. Digital ground is normally connected to ground. The digital inputs interface directly CMOS and TTL logic components.

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It is good practice to return digital ground through a separate connection path so that analog ground is not affected by the digital ground current.

Then I wonder if I need short the DGND and AGND together near the part like some ADCs with DGND and AGND? What about to short them at a farther point such as the power supply?

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diverger
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1 Answers1

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The point of the exercise, as TI notes, is to keep digital noise out of the analog area.

In a case like this, I would tie the 2 grounds under the device, making sure that the power source is physically on the digital side of the device

That means that digital return currents do not pass under the analog area to get back to the power source.

My general rule is that sensitive areas are logically furthest from the power source (and therefore the return)

Peter Smith
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