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I'm designing an analog synthesizer, which is controlled by an STM32 -microcontroller. In several parts of the circuit, I intend to use a GPIO pin to control switches in the circuit, and in two different parts as parts for generating audio. I'm worried about noise from the uC leaking in to the circuit, and my question is should I be worried, and if I should, what should I do to minimize the problems?

Some details: my PCB is laid out such that the right hand side is entirely analog, except for the said signals from the pins, and the left hand side contains the digital part, with DACs and an analog MUX (multiplexing the uC's built in DAC's) sitting on the dividing line. I have a ground plane on one of the inner layers of the 4 layer board.

The signals controlled from the GPIO's are:

  • two analog SPST switches switching signal flow
  • four on-off switches made from a single MOSFET, with the GPIO pin controlling the gate and switching unipolar analog signals on or off
  • a leaky op-amp integrator integrating a narrow pulse generated by the PWM of the uC, which is used as an analog signal and processed further.
  • and finally, a step transition in a GPIO is fed into the filter as a test signal for calibration.

The final output of the circuit has a one-pole lowpass filter around 70kHz to reduce spurious high frequencies.

It would be very difficult to try to place all the switches and such at the analog/digital boundary of the board, so they are placed rather deep inside the analog area of the board. On the other hand, being switch control signals, they carry very little current. Also the current into the integrator is quite small, some tens of microamperes during the pulses and otherwise essentially zero.

So, how much should I worry about inducing digital noise into the analog side here?

Timo
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I would be worried most about capacitive coupling. While most of the digital noise is high frequency, it oftentimes has some low-frequency components, so a high-pass filter does not eliminate everything you would like to have eliminated.

You might want to put guard traces around the digital control signals, and make sure your switches have proper decoupling between the control signal and the analog stuff.

For the MOSFETs, dont forget the gate-to-drain capacitance (also known as Miller capacitance because it is the source of the Miller effect that increases the effective gate capacitance). High-frequency noise present at the gate couples to the drain. While your MOSFET is on, it is not a problem, because you have a low-impedance path between drain and source, and source it at a low-impedance (virtual) ground. The virtual ground (which should be properly decoupled) will absorb the coupled noise. On the other hand, while the MOSFET is off (i.e. gate at ground), any noise at the gate is still coupled to the drain, but now works agains the impedance of the resistor feeding the signal to the mute switch. The higher the resistor is, the more coupling of noise into the signal will be observable. This is especially an issue if your design works with separate ground planes for the analog and digital part. If the digital ground and analog ground is tighly coupled, the noise level while outputting low is most likely no issue.

Michael Karcher
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    Another thing to note is that high-frequency signals which pass through amplifier stages without getting filtered out can cause distortion *even if the high-frequency signals have no low-frequency components*. – supercat Dec 14 '15 at 18:18
  • Correct. A slight nonlinearity an an amplifier can create intermodulation products. Google "intermodulation distortion" for details. So it is a good idea to perform R/C lowpass filtering (if the timing lag and possibly jitter is acceptable) at the border between digital and analog components. – Michael Karcher Dec 15 '15 at 11:05
  • Thanks for the answer! When you talk about switch decoupling, do you mean decoupling the power supplies, or adding caps to bypass the control signals? The R/C -filters will of course do exactly latter, so I guess that answers this part :) I can tolerate quite a large lag, as the switches will be controlled (indirectly) by users, so reaction on human timescales is enough. So I'll add RC -filters if I can just fit them on the board (it's quite busy as is). – Timo Dec 15 '15 at 15:44
  • About the Miller effect: can you elaborate a little? As I understand, this is mostly about amplifier stages effectively increasing capacitance. In this case the MOSFETs are connected as switches, with one side connected to the virtual ground of an op-amp summer, the other side to the signal through a resistor, and the gate voltage controlling whether the current gets to the op-amp or not. I can imagine the Miller effect affecting the effective bandwidth of the opamp summer here, but how would it affect the coupling of noise from the switch signal on the gate? – Timo Dec 15 '15 at 15:57
  • @Timo I hope the edit makes clear what I intended to say. I original wrote that answer on a mobile devices and focussed too much on brevity and too less on clarity. – Michael Karcher Dec 15 '15 at 19:12
  • @MichaelKarcher yes, that helps. Just to make sure that I got it right: the datasheet for the specific MOSFET gives an input capacitance of 22pF, and I actually have a pretty big resistor (220k if I remember correctly) feeding the MOSFET. So now, when it's closed, the gate-to-drain connection basically acts as a highpass filter with a cutoff around 33kHz, so the attenuation at 15kHz is less than 10dB. So basically the drain will see any high audio frequency noise on the uC pin, only slightly attenuated. Is this correct? – Timo Dec 17 '15 at 09:15
  • If you mean the MOSFET ist turned off by "closed" (an unusual convention), i.e. it is not muting the signal by shorting it to ground, the idea of your calculation is correct, although you use the wrong value. The input capacitance is the gate-to-source capacitance, which is "good", it grounds the noise. The gate-to-drain capacitance is called "reverse transfer capacitance" and is "evil", it passes the noise into the next stage. Any resistance before the gate forms a low-pass with the input-capacitance capacitance, and the reverse transfer capacitance indeed forms a high-pass as you wrote. – Michael Karcher Dec 17 '15 at 11:05
  • See this answer explaining the terms in the datasheet: http://electronics.stackexchange.com/a/83730/63977 – Michael Karcher Dec 17 '15 at 11:06
  • Ah, sorry about the "closed", I'm not an electrical engineer by training, so saying that a switch is "on" when the circuit is "closed" still doesn't come quite naturally :) And thanks for the clarification about which capacitance, it does give a factor of ten more (seems to be 2pF). So I get about 24dB of attenuation to 20kHz. Better, but I'm still going to see if I can lower the resistors, or at least make sure that I put an RC before the gate! Thanks for the answer, I absolutely did not realize before that this is something to watch out for! – Timo Dec 17 '15 at 14:04
  • Likely an R before the gate is enough. The 22pF input capacitance can be used as C. – Michael Karcher Dec 17 '15 at 16:53