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When I had a DFM review on a board I have designed, the feedback was that the pads on layer 1 (top) needed to be reduced in size, to:

"avoid the issue of copper temperature taking during wave soldering and for reasons of rise of alloy in the plated through holes."

and also to increase the size of the layer 4 (btm) pad to hole ratio to increase solderability (fair enough)

Has anyone seen this before, as I have always used an equal pad stack size for top and bottom copper.

droseman
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    How big were the pads that need to be reduced in size? – gbulmer Nov 24 '15 at 18:37
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    It can be done with the Pulsonix PCB software I use. I don't think it is needed very often. – Leon Heller Nov 24 '15 at 18:38
  • What about middle layers? Also, can you be more precise about what the review said - it seems bad English and I'm wondering if there is a nuance you may have missed? Do you mean "taking" or "taken" - I'm focusing on this because I've never seen this mentioned on a website so I feel it's important for you to be as precise as you can. What does "rise of alloy" actually mean? – Andy aka Nov 24 '15 at 18:40
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    I'll be asking similar questions myself Andy, i'm trying to understand the thinking behind why that might be requested. The quote was taken directly from the report - English is not their first language. – droseman Nov 24 '15 at 19:24

1 Answers1

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What they are trying to say is that solder may wick up through the (plate through) hole between the bottom pad (where the solder wave is) and top pad.

This is exacerbated by the warming of the hole via the heat absorbed by the top pad.

Remember that there is a pre-heat portion of the solder cycle, and the larger the pad the more it will heat up, and the more heat will conducted from it to the hole plating. The larger top pad will also serve as a heat source helping to maintain the warmer hole plating temperature.

When the solder wave arrives, it will flow father up the hole because the higher temperature improves capillary action of the molten solder.

Whether this is good or bad is a question. If the hole fills with solder, then the conductivity of the trace will increase, which could be goodness. OTOH, will this extra solder cause thermal problems?

Will the insulation around the hole in the middle layers handle the extended heat of the solder plug, and increased expansion/contraction of the plug as the board heats and cools during operation?

(Plus there is a slight reduction in the amount of plating and solder used if you cut the size of the top pad. Don't know if the savings will show ;-).

HiTechHiTouch
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