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I'm writing some firmware for a PIC18F6622 microcontroller. I use MPLAB IDE 8.73 + HI-TECH C Compiler for PIC18 MCUs (PRO) 9.66. When I set the XINST (Extended Instruction Set enable bit), the IDE gives me this warning: enter image description here

What settings should I do to be able to use the PIC's Extended Instruction Set?

EDIT: Just found on the net: 'If set (the EXTENDED INSTRUCTION flag), your program (or your compiler) must take it into account to use the correct addressing methods'. But what does that really mean?

Butzke
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m.Alin
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  • Have you got a link for the quote in your edit? I think the instruction set summary in the datasheet might be worth checking for a more detailed explanation. – Oli Glaser Sep 20 '11 at 16:45
  • Here's the link: http://www.micro-examples.com/public/microex-navig/doc/205-faqs.html – m.Alin Sep 20 '11 at 16:54

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IIRC, there is a setting the compiler options to tell it to use the extended set. Try setting this and it should stop complaining.

Edit - the above will work for C18, but apparently Hi-Tech does not support the extended set, according to this

Oli Glaser
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  • Yeah, I've read that link too, but I was hoping it is out of date :) – m.Alin Sep 20 '11 at 14:54
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    @m.Alin - I think it's still current. You could check the manual though (I just had a quick leaf through but couldn't see any option for extended mode, and there is no check box in MPLAB options like there is with C18) If you must use it, them maybe you could use C18 instead (I think you need the full version though) – Oli Glaser Sep 20 '11 at 16:41
  • I'm starting to believe too that the HI-TECH compiler doesn't support the extended instruction mode. Anyways, no worries, I'm not constrained to program in extended instruction mode. It would have been good, though, to make use of the advanced features of the PIC18. – m.Alin Sep 20 '11 at 17:01
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    I really really wish that Microchip had designed the extended instruction set to use a small amount of the "common" bank for FSR2 indexing (e.g. 15-24 bytes), and perhaps an additional, smaller amount for FSR0/FSR1 (maybe 7-8 bytes each), while leaving most of the common bank available as a common bank. A lot of code pretty much needs to have some unbanked registers available, and many PIC18's have ZERO uncommitted, unbanked registers registers when the extended instruction set is enabled. – supercat Sep 20 '11 at 17:15