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I'm trying to understand what's the function or R2 resistor in this transdiode log amp configuration. I suppose I've to match the right value to give in order to minimize the effect of input bias current. In a simple inverting configuration I'd put the value of the parallel resistors in the feedback loop, but I don't know what to exactly do in this case. I'm using both OP27E opamp (so really low bias current) than uA741C. I've done some simulations in TINA with and without R2 and I noticed some differences that advise me to understand more deeply which R2 value I've to use. Someone can help me to figure out? Log Amp configuration

Update: According to Hope consideration, I tried to place a R2=0, R2=2k (parallel of 2.5k Rpi // 10k R1) and R2=10k. Seems that the R2=2k works good at very low voltages, and V_out decrease a bit according to the fact that the resistor is nulling the bias current. Isn't it?

MarkU
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Brontolo
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2 Answers2

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There is some thumb role in Selecting Resistor for a Grounded input pin of an op-amp :

Since an op-amp is not ideal, then current consumption of input pins will not be neglected. Then beside its high-impedance input of a op-amp, when you attach high value resistors to these input pins, sometimes input current of op-amp pin would be comparable with these resistor currents in feed back loops. In this situation considering op-amp as an ideal device is a long wrong assumption.

Then first rule: choose your op-amp and resistor values in such a way that op-amp input current be far smaller than 1/10 of resistor currents on feedback loops.

The Second rule: as input current of op-amp input pins is not exactly zero, we choose R2 (according to your schematic index) equal to equivalent impedance that is seen from Vin- of op-amp . for example if we assume Rpi of transistor 2.5KR then equivalent impedance is 2.5K || 100K . This technique gives a approximate value for R2 according to mentioned reasons.

HOPE
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  • One-tenth as a rule of thumb is pretty crappy because the errror could be as high as 10%. The best way is choose op-amps with very low bias/offset currents and work to an error budget. Neither can you assume that the transistor is equivalent to a fixed value of resistance - because of the collector being a current source you can assume it is fairly high in dynamic impedance but it still has a slope and this slope will vary depending on collector current - see "early effect". – Andy aka Oct 25 '15 at 10:51
  • @Andyaka I think beside a low input current op-amp , using equivalent impedance of inverting pin gives a good response. – HOPE Oct 25 '15 at 11:01
  • Not really - a lot of modern op-amps have offset currents that are close to bias current levels so matching the resistance in both legs will have little effect on reducing the offset. – Andy aka Oct 25 '15 at 11:02
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The transdiode circuit has a formula that is: -

Vout = -26mV\$\times ln(\dfrac{V_{IN}}{I_S\times R_{IN}})\$

\$I_S\$ might be ~10nA and so for an input of 1mV and 10k resistor for Rin, Vout will be about -60mV.

If you consider that the input bias current of the OP27 might be 40nA (worst case) and this were not balanced by the resistor in the non-inverting lead, it would generate an offset voltage error at the input of 10k x 40nA = 0.4mV.

So now you have an efective input of 1.4mV or 0.6mV (polarity is unknown of the bias current).

Assuming the effective input becomes 0.6mV, the effective output is about -46mV.

That's a big difference (if you want it to be) but, of course, if the error went the other way the output would be about -69mV and a smaller difference.

If your baseline input didn't need to go below 10mV then an effective input of 10.4 mV wouldn't be so bad. 10mV on the input produces about -120mV and 10.4mV in produces an output of about -121mV.

Andy aka
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  • Thanks Andy, your considerations are precious. But according to these, i'd not see any important difference for input voltages major than 10mV. But look at these simulations in the range 0-1 V: adding the resistor (choosen following @Hope suggestions) changes significantly the V_out in the range 0-500 mV. Is the resistor altering the circuits more than necessary or what's happening? No R2: http://i.stack.imgur.com/WRGP2.png R2 = 2k: http://i.stack.imgur.com/Q3qqg.png – Brontolo Oct 25 '15 at 13:27
  • Sorry I'm not understanding your point. – Andy aka Oct 25 '15 at 13:35
  • You're right, I was confused on what you said and how to verify. Now it's perfectly clear. Just a few questions again: 1) I_s shouldn't be the base-emitter saturation current? My software gives me a value of 146 fA, but in the datasheet I find your 10 nA. I'm watching to the wrong thing in Tina or in the datasheet? 2) Using 10na, I get from the expression of V_out like 240 mV for 1 mV input and 10k resistor. Who is getting wrong? In this case, also at very low mV there would be no problem for the polarity current. Thanks in advice for you patience – Brontolo Oct 25 '15 at 14:24
  • I'm out on travels at the moment but I believe it's the base emitter current as you said but I read a value off the ON SEMI data sheet. – Andy aka Oct 25 '15 at 14:47
  • I read 10nA from data sheet but my. answer is about demonstrating that for a small input level the effect of the bias current is more significant than for a big input signal. – Andy aka Oct 25 '15 at 14:50