I suppose in binary addition (no negative numbers), overflow happens when theres a carry out?
Then for subtractor (2s complement), how do I determine it? From my understanding of my lecture notes, overflow happens when theres a change in sign or carry in of MSB is different from carry out? Is that true?
Then suppose \$011_{2s}+001_{2s}=100_{2s}\$ the answer is correct, but carry into MSB is 1 but carry out is 0, so according the the rule above, its an overflow?
11
011
+ 001 (2s)
=======
0100
Suppose \$X\$ & \$Y\$ are my sign bits, \$S\$ is my MSB generated and \$C_{in}, C_{out}\$ are my Carry in & out. I will implement Overflow, \$O\$ as
Suppose the above were correct, I will implement the logic to determine an overflow like $$Overflow = (Sign 1 \odot Sign 2)(Sign 2 \oplus Carry Out) + (Carry In \oplus Carry =Out)$$