11

The app notes I've seen for a SEPIC converter1 all tell me to size the coupling capacitor for ripple currents and voltages. I haven't seen one that tells me how to size the capacitance. Obviously there's some minimum; zero capacitance means no coupling, so the input has no effect on the output. To make the switching effects couple from input to output, we need enough capacitance to overwhelm any parasitic capacitances on the output side of the converter. Maybe 1000 pF should do that, I think, depending on what else is going on in the circuit. But the reference design I've inherited uses a 1 uF cap, which seems like it may be overkill for that purpose. Which makes me think there's more going on for sizing that capacitor than just overcoming parasitic capacitance.

How do I properly size the coupling capacitor in a SEPIC converter?

1 For example, this Texas Instruments AN-1484 Designing A SEPIC Converter.

Nick Alexeev
  • 37,739
  • 17
  • 97
  • 230
Stephen Collings
  • 17,373
  • 17
  • 92
  • 180
  • Which converter? – Leon Heller Oct 12 '15 at 13:37
  • 1
    When I did a SEPIC design I calculated the complex reactance 1/(2*pi\*fs\*C) and set it so that the reactance would be much less than my smallest load resistance. It worked fine. – Synchrondyne Oct 12 '15 at 13:45
  • Let's assume a certain properly designed SEPIC converter which has a coupling cap of x Farad. Now I want a similar converter to deliver a 10 times higher current. Then I would just scale everything relevant to that 10 times current up by a factor of 10 so now I would need a capacitor of value 10 times x. See you cannot say 1000pF should do or 1uF is overkill. It all depends on the design. – Bimpelrekkie Oct 12 '15 at 13:48
  • I'm not sure why the downvote or close vote. Some constructive criticism, please? – Stephen Collings Oct 12 '15 at 13:51
  • @LeonHeller Which converter? A SEPIC converter. https://en.wikipedia.org/wiki/Single-ended_primary-inductor_converter Did you mean something else? – Stephen Collings Oct 12 '15 at 13:52
  • @FakeMoustache Well, sure, it's application dependent. What I'm not clear on is the manner of that dependence. – Stephen Collings Oct 12 '15 at 13:52
  • @PeterK I'd considered that, but what's interesting is that with my inherited reference design, the impedance of the maximum load is only maybe twice the impedance of my coupling capacitor, and that design has walked to Mordor and back. – Stephen Collings Oct 12 '15 at 14:00
  • Some of the automotive SEPIC converters I have seen have a lot of capacitance spread across a large number of parallel MLCC caps (dozens). The purpose is dual- to handle the current and to obtain large capacitance. I second the impedance criterion by @Peter K. But since SEPIC can boost the output voltage, the reactive voltage drop across the caps is not that important as long as the overall voltage ratio stays within reasonable boundaries. – user02222022 Oct 12 '15 at 14:56
  • @StephenCollings Could you add a link to the app note, which you've mentioned in the 1st sentence? (This is only for the sake of stupid completeness.) By the way, I don't understand the close-votes either. – Nick Alexeev Oct 15 '15 at 19:26
  • @NickAlexeev http://www.ti.com/lit/an/snva168e/snva168e.pdf – Stephen Collings Oct 15 '15 at 19:27

2 Answers2

5

To make the switching effects couple from input to output, we need enough capacitance to overwhelm any parasitic capacitances on the output side of the converter.

If the two inductors are coupled then a SEPIC can become a flyback converter and the capacitor is not needed. This tells you that there is no minimum value for the coupling capacitor: -

enter image description here

I think it's worth linking to this article where I stole the picture.

The article is a called "Power supply topology: SEPIC vs Flyback" published by Electronics Weekly.

Basically and in simple terms you don't need the capacitor if using coupled inductors but, the more capacitance you apply the more like a SEPIC converter it becomes with the various trade-offs you'll get.

Andy aka
  • 434,556
  • 28
  • 351
  • 777
  • Good answer. But what if the inductors aren't coupled? – Stephen Collings Oct 12 '15 at 14:31
  • 2
    If you are using uncoupled inductors then all the energy reaching the load has to pass thru the capacitor and although efficiency doesn't significantly drop with a lower value capacitor the Vin range that can sustain the output voltage does. So I would consider Xc should be one-tenth (or lower) than Rload (min). I liken that capacitor to the one that "loses" voltage in one of those transformerless power supplies that keep cropping up every now and then. – Andy aka Oct 12 '15 at 14:40
  • Ah! I think I get it now! The capacitor, output inductor, and load form a voltage divider. Regardless of what the regulator may try to do, I can never get a voltage higher than what's created by that divider. So the cap, like you say, sets the minimum possible input voltage. – Stephen Collings Oct 12 '15 at 17:10
  • Yeah different words but they mean the same. The smaller your cap is, the higher your input voltage needs to be to get regulation. – Andy aka Oct 12 '15 at 17:11
  • Does that mean an SEPIC with uncoupled inductors is nothing more than a boost converter followed by a complex voltage divider? – Stephen Collings Oct 12 '15 at 17:31
  • Hmmm... still thinking about that one - been a long day!! – Andy aka Oct 12 '15 at 17:38
  • FWIW (moot) I've seen a SEPIC 'expert' rail on about a coupled inductor implementation NOT being a SEPIC. (And another offering a coupled version :-) ). – Russell McMahon Oct 14 '15 at 00:24
  • @StephenCollings The sepic can also work as a buck, depending on the duty cycle. – J. Joly Jan 06 '19 at 08:51
  • @Andyaka is it totally true that a SEPIC without decoupling capacitor is a flyback? Because for a flyback you need some space in your coil to store the power. Does a flyback also has an airgap for doing that? And choosing this capacitor, what kind does it need to be. With decoupling I think of ceramic, but if you use an X7R, your ESR is rather low, so you can have an unstable circuit. – J. Joly Jan 06 '19 at 08:53
  • Many flyback designs use an air gap in the transformer to reduce the onset of core saturation for a given primary inductance. In fact I would say more often than not an air gap is used @J.Joly – Andy aka Jan 06 '19 at 10:31
  • 1
    Ask yourself, does the sepic store energy in the primary that is converted to energy in the secondary? If the answer is yes, then some designs will require an air gap to make maximum use of energy storage whilst minimising core saturation (energy wastage). – Andy aka Jan 06 '19 at 10:40
  • Sorry I made a mistake in my previous comment ... I meant: @Andyaka is it totally true that a SEPIC without decoupling capacitor is a flyback? Because for a flyback you need some space in your coil to store the power. Does a SEPIC also has an airgap for doing that? And choosing this capacitor, what kind does it need to be. With decoupling I think of ceramic, but if you use an X7R, your ESR is rather low, so you can have an unstable circuit. – J. Joly Jan 06 '19 at 10:40
  • 1
    I’m going round in circles here. If you have a specific question about capacitor types used in a sepic then maybe raise a new question. For the few instances I’ve designed a sepic, I’ve probably used an X7R and not had problems. – Andy aka Jan 06 '19 at 10:47
3

Most of the steady state equations for a CCM SEPIC rely on voltage across \$C_c\$ being ~\$V_{\text{in}}\$, so it's best to keep the ripple voltage small compared to \$V_{\text{in}}\$. When using an electrolytic capacitor, choosing a part that could take the RMS current, pretty much makes ripple voltage across \$C_c\$ small enough. Of course, this may not be true with a ceramic part.

For parts with low ESR, maximum ripple voltage across \$C_c\$ would be less than \$\frac{I_{\text{out}}}{C_c f_{\text{pwm}}}\$. Start with 0.1 \$V_{\text{in}}\$ ripple voltage to choose a value for \$C_c\$. Here's a basic reference for designing a SEPIC, although it doesn't explicitly tell you how to choose the value of \$C_c\$.

It's interesting how, if \$C_c\$ is made small value and the output inductor is made smaller than the input inductor, and maybe a little capacitance is added across the switch, the SEPIC starts to look like a Class E converter.

gsills
  • 7,133
  • 16
  • 22
  • Which would you recommend on a basic SEPIC. Because can't it be dangerous to put a ceramic as decoupling (X7R) because of its low ESR and therefor have an unstable circuit? – J. Joly Jan 06 '19 at 08:56