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I am working on ACTEL Fusion platform which provides Cortex M1 softcore. Is it possible for AHB-lite slaves to access Cortex M1 memory. For e.g If my main C file has an array of unsigned_int 's. Is it possible to just pass the start address of array to a slave and the AHB slave can access multiple elements of the array at same time? All I want is to minimise memory writes to my custom hardware peripheral else it would mean 10 memory writes for passing uint x[10]. Is there any other workaround? The AHB-lite system contains coreMemCtrl,CoreAhbSRAM and CoreAhbNvm.

Ganesh
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(note: I'm addressing the general case of a moderately advanced processor interacting with FPGA fabric, rather than the details of this specific core in this vendor technology)

If I understand correctly, you want the slave to access array elements in true parallel fashion, ie, not just bypassing the processor core and using DMA to access them sequentially.

Clearly a conventional sequential access memory cannot support access at greater than it's actual physical width times number of ports (ie, if you had a 64 bit memory, and it was dual port, conceptually you might be able to arrange for parallel access to 4 32 bit elements. If your memory is FPGA block rams, it's possible you could set things up to have a very wide access width on the 2nd port side and get all 10 values at once this way)

If constrained to more common "memory", what you could do instead is utilize memory mapped IO to map a series of "hardware" (as in LUT) registers into the processor's memory space, and have them also directly feeding your peripheral in parallel. With some careful coding you can set up the program to use this as a storage location - though it may take additional work to get it integrated in a way that's as fast as access to main memory, and you will need to make sure it is both declared volatile and that any caching does not apply.

You might also want to think about how often the program needs to update these values - do you want to have working copies in ordinary memory and programmatically copy to the memory mapped IO at certain times? Or do you want to use the memory mapped IO as working variable storage?

Chris Stratton
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  • Yes you understood correctly. I am referring to a sort of DMA operation on FPGA fabric. The memory is accessed 32 bits but I know of no other way, than using AMBA protocol signals. My hardware peripheral has registers and offsets which are memory mapped in processor space. Now an interesting point you mentioned was 'make program use this as storage location'. Would it be possible to do int * x; x=0x1234567 //Actual Address of peripheral. So if I do x[]={10,20}. 20 goes to next sequential address which I can use in HW peripheral. I am not sure. – Ganesh Aug 08 '11 at 02:04
  • It would be possible if you declare that as a pointer to a volatile int, appropriately configure any memory management to map the hardware address to an accessible virtual one, and make sure there is no applicable caching of that memory range. – Chris Stratton Aug 08 '11 at 02:17