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I am implementing I2C using Bit bang. The slave can accept maximum baud rate of 400kbps. Iam not using external pull up, which is required because of which the fall/rise are not accordingly. I read somewhere fall/rise time can corrected by using external pull up or by running bus at very low speed. Can someone please tell what does running the bus slow means. Please guide me on this.

Thanks

Akshara Prasad
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  • It means a lower baud rate. You still need pullups though. If you are driving the line high and the slave pulls low you'll have a problem. – Samuel Jun 15 '15 at 16:42
  • Do you mean to say, this problem will occur during the ACK time by slave, because at that time SDA line is held high by the master and the slave needs to pull it to acknowledge. – Akshara Prasad Jun 15 '15 at 16:47
  • Also lowering the baud rate means, increasing the delay of pulse. Then how come it will effect fall/rise time? I mean to say what baud rate has to do with fall/rise time of pin val.? Please reply – Akshara Prasad Jun 15 '15 at 16:48
  • The value of the pull-resistor will obviously affect rise times - but the function is to pull the bus high as no device on the I2C bus should ever drive a HIGH. Otherwise you will get a bus conflict with one device driving a HIGH while an other will drive a LOW which will likely result in magic smoke. – og1L Jun 15 '15 at 16:51
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    As mentioned - you *must* use pull-ups, as the lines are allowed to be pulled down by either master or slave. – Eugene Sh. Jun 15 '15 at 16:52
  • You *MUST* have pullups on an I2C bus. It can't ever, ever, *ever* work without them. Ever. – brhans Jun 15 '15 at 16:53
  • Is it something like that, High is caused because of the pull up resistor and low is because of the open drain circuit connected to ground? – Akshara Prasad Jun 15 '15 at 16:56
  • Yes. I2C pins are usually open-drain. http://www.i2c-bus.org/i2c-primer/how-i2c-hardware-works/ – Eugene Sh. Jun 15 '15 at 16:57
  • Thanks I went through the link. It was very nice. In that case, let say I dont connect any pull up resistor then atleast the fall time should not be effected, it should be fast – Akshara Prasad Jun 15 '15 at 17:09
  • If you want any more help on your issue, you should include your hardware setup here. Anyway, In order to get a correct I2C communication, first fix the electrical issues. – Eugene Sh. Jun 15 '15 at 17:15
  • Add external pullups, or you will end up like [this guy](http://electronics.stackexchange.com/q/102611/7036). – Nick Alexeev Aug 29 '15 at 20:50

1 Answers1

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Measure the rise time of your SCL and SDA signals with an oscilloscope.

Then "slow" means slow enough for SCL and SDA to achieve legal logic levels after you release them.

Be aware that if this results in extremely slow transactions, some devices might fail due to time-out behavior.

The Photon
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  • But the problem which Im facing is that when START is send by master, the SDA line takes more fall time which is not acceptable by the slave, and hence slave cannot detect the START signal because of which it is not acknowledging. In such case how lowering the baud rate will work? Please help – Akshara Prasad Jun 15 '15 at 16:54
  • @AksharaPrasad, you need to explain your problem more clearly. A missing pull-up should make fall-times faster, not slower. – The Photon Jun 15 '15 at 16:57
  • Ya exactly, I mentioned that i am not using external pull up. And I am getting SDA Fall time very large. It should be 40ns max but I am getting SDA fall time of 990ns. And I read somewhere that fall time can be reduced by connecting external pull ups, as internal pull ups are very weak. Is it wrong?? – Akshara Prasad Jun 15 '15 at 17:03
  • @AksharaPrasad, Please add a schematic of your setup to your question. What chips are driving the bus? How are they connected to power and ground? – The Photon Jun 15 '15 at 17:45
  • Using external pull-up resistors vs internal weak ones should not affect fall-time. The drivers should be actively driving the lines low. The effect of the pull-ups would only be on rise-time. Something else is wrong. – DoxyLover Jun 15 '15 at 19:27
  • One more thing...After the acknowledgment from slave at 9th clock pulse, does the slave release the data bus high? And if so, can master starts the next transmission as soon as it recieve the ACK bit or should wait for sometime after the ACK. In my case after the ACK by slave the data bus goes high. Is this correct? – Akshara Prasad Jun 17 '15 at 16:45
  • @AksharaPrasad, from the [I2C Spec](http://www.nxp.com/documents/user_manual/UM10204.pdf): "The Acknowledge signal is defined as follows: the transmitter releases the SDA line during the acknowledge clock pulse so the receiver can pull the SDA line LOW and it remains stable LOW during the HIGH period of this clock pulse (see Figure 4)." So the receiver, when generating ACK, must hold SDA low for as long as SCL is high. And it should release SDA pretty much as soon as SCL goes low again. – The Photon Jun 17 '15 at 16:54