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I've designed the following amplifier circuit to amplify a DAC signal (sorry for the non-standard opamp symbol):

enter image description here

It's a power amplifier which amplifies a microcontroller DAC signal 0-5VDC and very low current, to 0-22VDC, with current draw up to 2.5A. That would be a gain of approximately 4.4. The input voltage only changes several dozen times per second. Let's say 100Hz to be safe. But it needs to operate over a wide range of (fluctuating) loads. Load could be from 5 ohms to 5 megaohms for example.

It simulates just fine with the default PMOS component, which I suppose is an ideal FET. But when I add all "real" components in, I get oscillation occuring. How might I stabilize this? How accurate is a simulation in such things compared to a real circuit?

Is there anything else that looks like it could be an issue in this circuit, for example part choice, voltages, etc?

LTspice v4.22s schematic download: enter link description here

EDIT:

I've made some changes based on mostly trial and error, but educated by the replies below. I managed to remove the oscillation fairly quickly, but, I have no idea why adding a capacitor in each of these locations solved the problem. I needed both of them, and I needed to fine tune their values a bit.

Greatly reduced oscillation using a combination of ideas

This is for a power supply so the new voltage spike at the beginning is rather disastrous. Here is a closeup of it now with a resistor added in series with C1 to stop it oscillating:

Closeup of voltage spike

Ryan
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  • Please add the characteristics of your amplifier (gain, bandwidth ...). – MAC Feb 26 '15 at 06:42
  • Added above, just below the screenshot of LTspice. – Ryan Feb 26 '15 at 06:47
  • I'm not sure how to make the screenshot be able to zoom in, but I can view the full size if I right click it and go to "open image in new tab" in Chrome. – Ryan Feb 26 '15 at 06:51
  • Add the spice file, will help us to simulate and check the output – AKR Feb 26 '15 at 06:53
  • R4 appears non-productive (remove it) -> It causes 10 x (OpAmp_out - Vbe_Q1) to appear on the MOSFET gate. That's fine if you are using that as your main means of getting something like 10 x Vin at the output and the output is a current amplifier - as was the case in your prior question and circuit - **BUT** you are now using "proper" voltage feedback via R3 / R2 and the two methods are fighting AND the MOSFET is not a current amplifier per se so the two are fighting. | So remove/short R2. Later you may want a resistor in Q1c and a zener clamp on the PFET gate but probably OK without for now. – Russell McMahon Feb 26 '15 at 09:59
  • I'm not having any luck with removing R4. The output is now just bouncing between Vcc (23.5V) and the amplified voltage. I tried adding a resistor. But I'm not sure how to add a zener, or if that would solve the problem. – Ryan Feb 26 '15 at 10:12
  • One convenient place to reduce the gain at high frequencies would be a capacitor across R5. 1000pF would give a time constant of 2.2uS, good for 70kHz. You don't mention the oscillation frequency but if it's a lot higher than that, I'd start here. –  Feb 26 '15 at 10:54
  • Thanks Brian. See above for where I placed the capacitors. Is this stupid placement? Also the oscillation starts around 10Khz and builds up to a maximum at 30Khz. After that there are a lot of overtones and noise. You can see the FFT in a comment below. – Ryan Feb 26 '15 at 11:12
  • The MOSFET gate MUST be DC coupled to Q1. A capacitor there as well may be in order (probably from FET gate to ground) but with no DC path some very strange and nasty things will happen. – Russell McMahon Feb 26 '15 at 13:38
  • The capacitor at opamp output (or the Zoebel series RC at the same point) is somewhat like slipping your clutch in a manual car while waiting for a green light - the output of the amplifier is being fed directly into a circuit designed to dissipate some of its energy. In the real world it may work because the opamp has finite drive capability, but it's not ideal. Capacitors which adjust phase shift will usually be at points of non zero impedance so they form a frequency selective impedance divider with other components. – Russell McMahon Feb 26 '15 at 13:45

2 Answers2

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A bare bones OP-AMP is "close-to-unstable" in a lot of circumstances (even in very simple circuits). There is a parameter called phase margin and this informs the reader that at unity gain, the inverting input is significantly close to being non-inverting - phase margin tells you how close the inverting input has become a non-inverting input.

For instance, a typical op-amp might have a phase margin of 40 degrees. This means that instead of the inverting input producing a 180 degrees shift (i.e. true inversion) it is more like 40 degrees.

This of course will be at a high frequency where the op-amp's characteristic has dropped to unity gain i.e. far above where you would consider using it normally. But it's still there in any op-amp circuit you might design.

If you add transistor amplification (say 20dB) after the op-amp output (and before the feedback), you will now have a phase margin that is 40 degrees at a gain of 20dB and, if you determined what the phase margin is at a higher frequency (one where the extra 20dB is eroded to zero dB) you'll almost certainly find that the phase margin passes thru zero degrees and therefore you have created an oscillator!!

Here is a similar question/answer

EDIT - I've added a picture of the open-loop gain and phase of a medium speed op-amp to consider: -

enter image description here

This graph is the basic operation of the op-amp in question (AD8605) and is irrespective of how you apply feedback and how much you apply. The only point is that the red line (gain) will rise maybe 10dB when you put transistors within the feedback loop.

With the red line rising by 10dB, the unity gain crossing point is around 30MHz - what is the new phase margin - it's probably about -40 degrees i.e. well past the point of stability. Look at the graph - with sufficient gain added inside the feedback loop, this device (AD8605) will oscillate at about 25MHz.

Lower the gains in your transistor circuits is my advise.

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Andy aka
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  • Hmm, this seems like really good advice. Reading the link you sent, I think I largely understand it. However, what I don't understand is what they call "frequency". Isn't my frequency always below 100Hz, in that case the entire issue is a non-issue? If not, how can I calculate the frequency? – Ryan Feb 26 '15 at 09:55
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    Your desired operating frequency may be quite small and easily dealt with by an op-amp but the op-amp doesn't respect or know your circuit aims; it just does what it does best. It doesn't understand that you have added transistors to it's output and it doesn't know it isn't meant to be an oscillator. – Andy aka Feb 26 '15 at 10:13
  • How can I decrease the gain of the transistors? I don't exactly understand how I'm controlling their gain at all. If this graph means anything, the transistors are adding a lot more than 10dB: http://i.imgur.com/hvfqtOD.png – Ryan Feb 27 '15 at 02:13
  • I'd use an emitter resistor in Q1 - this will dramatically reduce the gain of Q1. Why on earth do you have that capacitor in series with the gate - this will prevent the circuit operating correctly because there is no DC control in the loop. – Andy aka Feb 27 '15 at 11:42
  • Simply because after hours of trying different things, it's what worked. In the simulator at least adding a capacitor on the emitter of Q1 doesn't really have an effect. In fact, Russell told me to remove that entirely (it's there on the original schematic above) – Ryan Feb 27 '15 at 14:06
  • Okay well after watching this lecture https://www.youtube.com/watch?v=YQMP-FLHvwk I was fascinated by how the internal capacitance of the opamp is tuned for its particular gain and dominant pole. He made a random comment that the capacitance could be adjusted externally across the feeback loop input and output to adjust that pole and compensate for instability. It struck me that I got that randomly working before. So now I've combined both this technique and adding a resistor back in to reduce the gain of the BJT transistor. The opamp oscillation settles down! http://i.imgur.com/cVMWS7L.png – Ryan Feb 27 '15 at 14:20
  • @Ryan I'm pleased it has settled down. The devil is in the detail with op-amps. All practical op-amps are fairly crappy until you apply negative feedback BUT there are considerations and phase margin is a pretty important one if you are inserting "stuff" into the feedback loop. You might also find that adding the cap directly onto the op-amp can make these problems worse. Try removing it or lowering it and applying a step demand input - see how the output may "ring" before settling down. Regulator chips try and avoid this type of thing because the output can "ring" and destroy chips. – Andy aka Feb 27 '15 at 16:08
  • @Ryan, I have simulated your circuit - and I think, you can reduce the feedback capacitor down to 100nF or even a bit smaller (in case you want to do it). By the way - with this capacitor, you have turned the amplifier into an integrator with a rather large time constant. It was not clear for me from the beginning that your signal is as low as 4Hz only. In terms of control theory you did a heavy lag compensation, which makes the whole system rather slow - however, if it shall work at 4..5 Hz only .. no problem. – LvW Feb 27 '15 at 18:23
  • What about if the input was 100Hz? That's my maximum input freq. – Ryan Feb 28 '15 at 01:55
  • @Ryan the feedback capacitor across the op-amp will slug 100Hz if it is too high so I would recommend using the emitter resistor to reduce gain and see how big you can get this before functional operation is compromised. Then I would try a small cap across the 75k feedback resistor to see what effect it has. Be prepared to dismiss ideas that don't work be retry again with different ideas in place. – Andy aka Feb 28 '15 at 10:46
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The LM358 device is unity gain compensated. That means: This opamp is stable down to unity gain with a stability margin which will be "acceptable". Unity gain is identical with loop gain=open-loop gain of the oamp (due to 100% feedback). However, in your case, the loop gain is even larger than the open-loop gain of the opamp (feedback factor with gain). In addition, both transistors add phase shift to the loop which is very critical. Thus, no surprise that the circuit oscillates.

You can stabilize the circuit connecting a R-C series combination BETWEEN both input terminals of the opamp. The corresponding values values depend on the real frequency response of your cicuit (loop gain). Therefore, can you show the simulation of the loop gain response?

LvW
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  • Sure here is a zoomed in version http://i.imgur.com/VyCq6zs.png – Ryan Feb 26 '15 at 10:15
  • So around 30Khz? Here's an FFT, there are also some harmonics going up approx 30Khz each band http://i.imgur.com/CMRDxDo.png – Ryan Feb 26 '15 at 10:17
  • Am I trying to implement a filter like a Sallen-Key low pass filter to remove the high frequency components? When I try to add filtering like you say, it just shifts where and how frequent those oscillation frequencies occur, but they don't seem to diminish. – Ryan Feb 26 '15 at 10:30
  • No - filtering does not help at all. You must inhibit oscillations from the beginning (loop gain compensation). – LvW Feb 26 '15 at 10:53
  • @ryan, I have asked for the LOOP GAIN response (ac simulation); this is necessary to determine the compensation elements. The output waveform doesn not help too much. – LvW Feb 26 '15 at 10:55
  • I'm sorry I'm not sure what that is or how I can produce it. Any tips? – Ryan Feb 26 '15 at 11:06
  • Perform an ac simulation. For this purpse, put an ac voltage source (1V) BETWEEN opamp output and base of Q1. Then, display the voltage ratio output/base (in dB). For this simulation, set the signal input (V2) to zero. This gives the loop gain, which will proof that/why the circuit oscillates. – LvW Feb 26 '15 at 11:17
  • What frequency should I set the AC (sine) voltage generator? – Ryan Feb 26 '15 at 11:31
  • I set it to 4Hz which was the same as I was using for the input before, and I got this on the output: http://i.imgur.com/8X5BUs5.png – Ryan Feb 26 '15 at 11:33
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    Ryan, an ac analysis is a small-signal analysis in the FREQUENCY domain. Here, the frequency is tuned from low frequencies (1Hz or so) to very large frequencies (100 MHz). Use log. tuning and 100 points/decade. Try to become familiar with the simulator options! – LvW Feb 26 '15 at 11:52
  • Oh! Okay. Like this? (my settings are shown lower-left) http://i.imgur.com/7zqzGbv.png what does it mean? Why are there two lines, solid and dashed? – Ryan Feb 26 '15 at 11:57
  • Yes - that´s an ac analysis. Did youset the normal input source to zero? Display the voltage RATIO (as mentioned before). The resulting magnitude should show a falling characteristic starting with high gain values. Important is the PHASE at that frequency where the magnitude crosses zero dB. – LvW Feb 26 '15 at 12:04
  • Yes V2 is set to 0V. But how do I set RATIO? – Ryan Feb 26 '15 at 12:09
  • Only now I have seen that you have added a resistor and a capacitor in the feedback path. That was NOT my recommendation (I have said: Between both opamp inputs). Nevertheless, this also stabilizes the circuit by drastically reducing the gain, but what about the desired main function of the circuit? – LvW Feb 26 '15 at 12:13
  • But how do I set RATIO? Name the nodes A and B and display dB(V(A)/V(B)). – LvW Feb 26 '15 at 12:15
  • I tried putting RC between opamp inputs, but I didn't get much of a useful result with that. For some reason the gain remains exactly the same after adding that stuff. Here's the ratio graph. It would be interesting to see how to calculate exact values from it: http://i.imgur.com/mPAnewK.png – Ryan Feb 26 '15 at 12:41
  • Oops, I forgot to do the dB transformation. Here it is as you described: http://i.imgur.com/CfxYBbW.png – Ryan Feb 26 '15 at 12:50
  • Ok, so I followed this tutorial, and it's a bit different to what you explained - they use an open loop and put the voltage at the inverting output https://www.youtube.com/watch?v=YYWlPFBebfc it gave me this result: http://i.imgur.com/LNOG6Vm.png -125 degrees phase margin – Ryan Feb 26 '15 at 13:20
  • The weird thing is, I tried to keep the phase consistent with the gain by adding various caps like in the video, and my curve ended up what I thought was great: http://i.imgur.com/xvebm3s.png however, the oscillation is still terribad: http://i.imgur.com/kbNQN9X.png I guess I don't really know what I'm doing, or whether this is actually the method to solve the problem with less trial-and-error... I guess you have to watch that 7 minute video to understand what I'm trying to do. – Ryan Feb 26 '15 at 13:49
  • Perhaps the phase angle needs to be as horizontal (unchanging) as possible, because on his original working opamp circuit it's quite flat for a while then drops off? EDIT: Hmm, nope. This whole thing seems to have nothing to do with getting rid of oscillation.. I can't see a correlation between the curves that have oscillation quickly dampened and any particular shape that I make the gain/phase curves. – Ryan Feb 26 '15 at 14:15
  • Ok after much hacking and comparing with other videos of what this should look like, I believe this is what you are looking for @LvW http://i.imgur.com/AyVu8Xa.png – Ryan Feb 26 '15 at 14:22
  • Sorry, I was absent for some hours. Yes - the graph shows that the gain is above 0 dB if the phase reaches 180deg. This indicates instability (Nyquist criterion). It must be your goal that the loop gain is already below 0 dB for a phase shift of 180deg. – LvW Feb 26 '15 at 16:25
  • Sorry again - I was busy for some hours. Question: What shows your phase response ? It looks not OK (should start at -180deg). – LvW Feb 26 '15 at 20:07
  • I can't figure out why it starts at 0 degrees. But the original oscillating circuit with no caps added already has a gain less than 0dB when the phase reaches -180. – Ryan Feb 27 '15 at 02:01
  • I might have figured it out.. its the difference between putting the .AC source at the Vout pin of the opamp vs the - pin of the opamp. At inverting input: http://i.imgur.com/hvfqtOD.png – Ryan Feb 27 '15 at 02:15
  • The response looks correct - however, it shows a VERY critical situation - caused by the additional gain of the transistor stages. Can`t you reduce the gain? It must be your goal to have a gain less than 0 dB if teh phase is 0 deg. (Presently you have 70 dB !!). Try the same simulations either with an R-C circuit in the feedback path (as you have shown in one of your circuits) or as recommended by me (R-C directly across both opamp inputs). – LvW Feb 27 '15 at 09:25
  • I just cant get it to work with RC across the two inputs. If you try it yourself on the file I uploaded in the post, you'll see it's simply delaying the time the oscillation takes to start. The oscillation then repeats forever. However, in reply to Andy Aka you can see a new variation I did there. I'll see if I can get an RC circuit working in the feedback loop now. – Ryan Feb 27 '15 at 14:44
  • Nope can't get that to work anymore with Q1 lower gain. Most values for the capacitor seem to actually make the oscillation worse. Or they make the oscillation from V to 0V instead of V to Vcc. – Ryan Feb 27 '15 at 14:47
  • By the way - doesn`t the MOS require a positive G-S voltage? Should we switch-over to chat ? – LvW Feb 27 '15 at 15:28
  • Forget my last comment. – LvW Feb 27 '15 at 18:18