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I just wondered, when I saw my new MicroSd memory card , how the hell can 32GB fit in that space?

Simple math:

it's around \$\frac{1}{2}cm^2\$ (my estimate, most of it is controllers anyway) and it contains 32GB cells. So \$\frac{5*10^{-5}}{2^{(5+30)}} = 1.45*10^{-15} m^2\$ space for one cell. Since atoms are in area about \$10^{-12} m^2\$ , how come the memory cells are smaller than atoms?

Here is an image of what a microSD card looks like:

MircoSD Card

Daniel Grillo
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Randalfien
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  • Many high capacity microSD cards are created from several stacked flash memories. – Thomas O May 08 '11 at 18:22
  • So it's in layers? interesting, I wonder If there is any limit to the amount of data to be stored on a microSd card. – Randalfien May 08 '11 at 18:36
  • more layers, more cost. Also, microSDHC is limited to 2 terabytes I believe, in terms of physical addressing. – Thomas O May 08 '11 at 19:16
  • SD is up to 2GB. SDHC is used for 2GB-64GB. SDXC is used from 64GB to , potentially, 2TB. But I wouldn't be surprised if there would be a faster communication protocol implemented before 2TB would comes around. – Hans May 08 '11 at 20:58
  • Questions support [math latex](http://meta.electronics.stackexchange.com/questions/434/test-the-new-latex-markdown-in-this-sandbox-question) for equations in questions. – Dean May 08 '11 at 22:44
  • Is there a way or a tool to fix any physical errors in such cards, so that when we store important data we can retrieve from that. – indianwebdevil Nov 18 '11 at 13:44
  • Your figure for the size of an atom is completely wrong - you squared the units, but it looks like you forgot to square the numeric part of the linear dimension. Though even doing that would seem to be a little wrong. Where did you get your information? – Chris Stratton Feb 15 '18 at 19:13
  • Samsung has just announced the development of a [96-layer QLC flash chip](https://www.custompcreview.com/news/samsung-announces-96-layer-qlc-v-nand-ngsff-sz985-z-nand-ssd-fms-2017/). Each die has 96 stacked layers of flash cells (and there maybe a couple of stacked *dies* in one package), each one is capable of QLC. QLC means 4 bits per cell (each cell stores 1 of 16 different analog values rather than just a 1 or 0, longevity takes a major hit, but capacity goes way up). Tricks like that are a major part of how that much data gets crammed into such a small space. – Sam Feb 15 '18 at 19:47

2 Answers2

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Flash memory is currently made in a \$19nm = 1.9 * 10^{-8}\$ m process. Since a cell is basically just one transistor, this leads to a minimum of \$3.6 * 10^{-16} m^2\$per cell.

In silicon, the inter-atomic distance is about \$2.35 *10^{-10}m\$. Making the area that an atom occupies about \$5 * 10^{-20} m^2\$.

Now you have to see that each cell is a three-dimensional object, leading to about \$10^6\$ atoms per cell.

Fits easily...

Mind you, the above numbers are estimates, ignoring material mix etc.

Now lets look at the area size of a 64 Gbit chip. Thats about \$7 * 10^{10}\$ cells. If it were square-ish, it would have about \$2.5 * 10^5\$ cells per row. Whoops, thats \$2 * 2.5 * 10^{-8} * 10^5 = 5 * 10^{-3} m = 5mm\$ square at least.

For a 32GB card, we'd need 4 of those. So yes, they probably are stacked.

With the expected higher integration, maybe down to a 10nm process, and threedimensional stacking of transistors within the chip, it looks like the volumetric size will be reduced by about a factor of ten within a year or two.

Null
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posipiet
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Indeed, the latest (128GB) cards have as many as 17 thinned chips stacked up with in some cases 11nm chip features, 3 bits per cell and other "Fun Stuff" (tm). They don't seem to be that more sensitive to X-rays than a 2GB but they are notably "hotter" than low density cards and can draw far more current when writing data.

Conundrum5642Z
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