2

Below are two pictures of a portion of a PCB layout I did. The first shows the signal traces and the second shows the ground pour. U1 is an 8 MHz MCU, U3 an I2C sensor, U4 a RTC, and U2 a boosting power supply. The PCB is limited in size.

I don't have much experience in PCB layout, so there are probably a few fundamental flaws in the routing. It functions fine, though I can't comment on EMI. For VCC and GND I tried to use a gridded layout as much as possible, and add bypass caps as close as possible to the pins.

Now I'm trying to learn better PCB layout, e.g. signal return paths, reducing EMI, MCU having it's own little ground plane (Olin's answer), etc.

Can I achieve best practice layout on this fixed size PCB with 2 layers, or should I move to 4 layers?

enter image description here enter image description here

Community
  • 1
geometrikal
  • 4,921
  • 2
  • 23
  • 41
  • 1
    Will this device be in an EMI sensitive environment? – Dan Laks Nov 23 '14 at 00:03
  • 1
    @DanLaks No, it will spend most of its life underwater. – geometrikal Nov 23 '14 at 00:07
  • 3
    Extreme Marine Immersion? Or is that a different form of EMI? – Majenko Nov 23 '14 at 00:13
  • 2
    @geometrikal, so why incur the extra expense of reducing EMI when it won't make a difference? 4-layer boards are typically much more expensive to fabricate than 2-layer. If you can get by with 2-layer, I'd stick with that. – Dan Laks Nov 23 '14 at 00:15
  • 1
    @DanLaks If all these layout considerations are just about reducing EMI and there is nothing else wrong, then yes I won't bother. (My inexperience is now obvious :) – geometrikal Nov 23 '14 at 00:19
  • 5
    Olin's answer that you linked to is excellent. But if you don't have specific requirements imposed on your design, the definition of a "good" PCB layout becomes a little nebulous. Personally, and I think most here will agree with me, PCB layout is something of an artform. There's no one "correct" way to layout any circuit. If the components are placed in efficient locations, the traces are nice and short, and there aren't a lot of unnecessary vias or spaghetti traces everywhere, it's probably good. Most of all, it should *look* pretty ;). – Dan Laks Nov 23 '14 at 00:26
  • 1
    @geometrikal What boost converter IC are you planning to use? – Nick Alexeev Nov 23 '14 at 00:29
  • @NickAlexeev LTC3525 (http://www.linear.com/product/LTC3525) I didn't mention in the question, but I've tested probably about 30 of these and they all work. I'm in the process of reviewing it all as the next run will be a few hundred PCBs. – geometrikal Nov 23 '14 at 00:37

1 Answers1

5

It doesn't seem that a 4-layer board is strictly called for in this case. A 2-layer board would be sufficient.

There are no high speed signals on the board. I2C is not a high enough speed to worry.
The board will work in a low EMI environment. The level of EMI underwater is probably as low as it gets.

Other comments

Gridded layout (aka Manhattan routing) doesn't work as well for boards that have mostly SMT components, and many of them are quad-pack, and there's not a lot of spare real estate.

I would change the layout of the LTC3525 boost converter. It should look more like fig.3 in the datasheet. It's great that you have built and tested a batch of these devices. If you further improve the layout of the boost converter, you should have less EMI. That may lead to better readings from sensors.

Nick Alexeev
  • 37,739
  • 17
  • 97
  • 230