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I have been trying to figure out the "right" way to size pads for surface mount components, and I have found some conflicting wisdom floating around the internets.

Lets say I have this hypothetical part that requires two square pads, the centers of which are 15 units apart, and the edge that are 5 units on edge.

This SO post suggests that I should have my copper be the exact size of the pads, and the mask be slightly oversize to account for shrinkage and/or misalignment. This seems somewhat reasonable, as relative shift/shrink/misalignment can be tolerated. Under this scenario I might want the the masks to be 6x6 holes with the same center-to-center spacing as the underlying copper.

Conversley, in a different scenario if you were to oversize the copper to 6x6, you would gain the same tolerance to misalignment,and additionally some extra adhesion holding the pads down. This approach is suggested in some BGA/QFN packages I have been looking at. (Example 1) (Example 2) (Example 3)

I realize that there isn't really a "Correct" answer, but what motivates one arrangement verses the other?

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meawoppl
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  • Your question is quite deep and requires a deep answer addressing quite a number of trade offs. My two cents: if you are hand soldering it the bigger pad is a must to simplify the heating process. – Vladimir Cravero Aug 26 '14 at 22:12
  • Over [here](http://electronics.stackexchange.com/q/123046/3119), I asked a similar question, although mine was focused on land pattern vs pad size. – Simon Richter Aug 27 '14 at 07:30
  • Good link, it was a helpful read, and I would suggest other that find this question check it out. – meawoppl Sep 01 '14 at 23:26
  • Most recommendations seem to be for NSMD even on BGAs. The stress on the ball is less, and joint quality is higher. Pad adhesion to the backing material doesn't seem quite as important as preventing solder ball cracks. There are cases for SMD (some power products for thermal performance), but generally it sure looks like the current wisdom is to just go NSMD. Solder mask tolerances are almost always WAY worse than copper, too. – darron Sep 02 '14 at 02:36

3 Answers3

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It depends to some extent on where the part is metalized. If the pad is restricted to the bottom such as on a QFN package the optimal pad will be different from that for a ceramic capacitor, say, that is metalized on the ends- where you'd want a fillet angle to the pad.

If you can get ahold of the IPC standards (maybe at a University library), I've found them to be very helpful. Some software (eg. Altium) has an IPC wizard that takes into account the IPC recommendations (with options to edit the program's selections) and (for some parts anyways) has three levels of density to select from (nominal, high density, low density).

I agree with @Vladimir that smaller pads can be a pain, and in fact can make the boards hard to inspect because you can't see the fillet easily through a microscope that is vertical.

For what it's worth, the solder mask used in a recent board with QFNs used a 0.106mm (4 mils) default (rule-based) expansion factor, which left slightly less than 4 mils solder mask sliver between 0.35mm wide QFN pins (0.65mm pitch).

Spehro Pefhany
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  • I found the IPC standards through my University (thanks for the lead on that!). They are *really* obtuse to read, but I think they contain the answers that I am looking for. I am a bit surprised that there is no OS land-pattern calculator out there. – meawoppl Sep 01 '14 at 23:23
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For regular non-BGA components, non-soldermask defined pads (where the mask opening is larger than the pad) are generally preferred.

The copper can be made to tighter tolerances than the solder mask. Also, the thickness of soldermask that creeps onto the pad can prevent components (e.g. QFNs) from touching solder paste on the pad.

venny
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Different sources give conflicting advices because they refer to different needs. You need three sizes to take care of: the copper area, the solder mask and the paste mask. Their sizes are usually determined by:

  1. The component itself: contact position and tolerances must be taken into account.
  2. Fabrication tolerances. Fabrication houses have different values for these, which you need to learn in advance, or at least estimate. With these you can calculate what will your pads look like if everything goes off-spec.
  3. The soldering method: SMD components that you might attempt to hand solder (e.g. in a prototype) should have pads that go a little over the component so you can place your soldering iron tip. If you are going fully automated, this is not an issue.
  4. The PCB finish (hot air leveling, gold flash, etc.) affects the "wettability" of the pad, which affects you if you're going into very small stuff.
  5. The available space in your board. If you need to fit many tracks and components in a tight space you will want your pads to be at their absolute minimum.
  6. The solder mask is important to avoid solder bridges, so if your solder mask tolerances are poor and your pads are too close to each other, you might need to make them smaller to make room for the solder mask.
  7. The thickness of your stencil determines the amount of solder paste that goes in your pad. You don't want your pad to overflow (e.g. big pads like center pads in SOIC chips), so your paste mask needs to be adjusted to avoid that if your your thickness is high.
  8. Mechanical properties. With large components like aluminium capacitors, the firmer the solder joint, the better.

This list is most probably incomplete, but it should give you an idea of what values you need to take care of in your particular project.

Guillermo Prandi
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  • I think this question gives the best overall flavor of the tradeoffs and factors involved. It turns out to be a quite complicated question really, thanks for explaining that to me! – meawoppl Sep 01 '14 at 23:27