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Refer to this question I had asked a few days back: PWM DAC Filter explanation

Hi, It is getting extremely difficult for me to create the PT0 and PT1 signals as given above. I am using a dsPIC30F device. Two PWMs are created with independent duty cycle control, however, the duty cycle change happens by controlling falling edge, where as the above demands that PT0 must have fixed falling edge and variable rising edge...how to achieve that?

On the other hand, I am thinking of using a simple 4th order sallen-key LPF to filter out most of the PWM fundamental...and set its cut-off to say less than half of the PWM fundamental. My sampling frequency for the DAC output (yes, I am sampling my own DAC output) is LOW about once in every 25ms.

Can I remove the left over ripple, by using a small LC filter in line with the DAC output...this works in voltage regulators...will it work here. The output is going to drive a high input impedance OpAmp...so current drive capacity is not in question.

Any pointers?

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Vishal
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    I wonder if an integrator configuration of an op-amp into a capacitor filter output would work? so the voltage on the output would accumulate based on the average time on/off of the PWM cycle.. I'm just throwing out ideas here, maybe try breadboarding it – KyranF May 07 '14 at 10:33
  • here ya go, here is a dodgy example of what i mean.. http://www.avdweb.nl/arduino/hardware-interfacing/simple-10-bit-dac.html – KyranF May 07 '14 at 10:36

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From your previous question, it sounds like Dave does not recommend using that method.

There likely isn't a point in using an LC filter in line after the 4th order sallen-key. Depending on the quality of your sallen-key, you may not get any more benefit out of an LC filter.

With such a low sampling frequency, and no need for high output impedance, why aren't you maximizing the PWM frequency and filtering it with an appropriate RC filter?

From your datasheet: "PWM Frequency for 11-bit resolution (@ 30 MIPS) = 29.3 KHz for Edge-Aligned mode"

Your sample frequency is 40 hz which is 3 orders of magnitude different. A single RC filter gives you a single order filter which gives 20db/Dec. With 3 decades of drop-off, you should get a pretty smooth signal out relative to your sample rate.

horta
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  • We are using a dsPIC33FGP710 part, which runs default at 25MHz. Our RTOS is programmed to use this clock frequency. Our ADC is 12bit, Since I have to share a certain signal information using an analog voltage signal, with other controllers...which may not have serial connectivity, I must use a DAC which is also 12bit to faithfully reproduce our signal information. So for 12bit resolution my PWM signal frequency has to be 25e06/4096 = 6KHz. I am thinking of having a cutoff at 4KHz for the sallen-key 4 order LPF. – Vishal May 08 '14 at 08:50
  • Now, my sampling frequency has increased...owing to change in algorithm...its 250Hz now. still much lesser than PWM frequency of 6KHz. so If I setup the cutoff at say 2.5KHz, I will get good enough noise immunity, but the signal itself is also attenuated a lot and settling time will be increased. If the cutoff is at 6KHz, so that only the fundamental sine is allowed, the ripple is HUGE..almost equal to the signal itself. I am therefore trying to find a middle ground...and 4KHz seems to be good enough. it is so difficult to get the DC part from a PWM signal...i am preplexed at this juncture. – Vishal May 08 '14 at 09:06
  • My solutions come from the excellent answers to this question: http://electronics.stackexchange.com/q/34843 – Vishal May 08 '14 at 09:08
  • What kind of chip uses an accurate, fast analog signal these days for communication? With the design issues you're having to go through, I'm wondering why you're not paying an extra dollar to get a built in DAC and just use that? This is one PIC with a built-in DAC that might set you back 1 extra dollar: http://www.microchip.com/wwwproducts/Devices.aspx?dDocName=en532310 – horta May 08 '14 at 19:57
  • Horta, 'these days' is an unlikely situation in our field. We have DC motor drives working since the 80s, (discrete analog controllers...which can easily be repaired in field without much hassle)...and our digital controller is going to work with them. so you can imagine the "backward-compatibility" tussle that is going through our heads. By the way, we still manufacture these DC Motor drives and they sell because of their field worthiness and reliability. – Vishal May 09 '14 at 07:53
  • We have already chosen the device...and other important peripherals have taken priority above the DAC. so we cannot change the device now... – Vishal May 09 '14 at 07:54
  • These controllers really dont 'communicate' in the sense of how controllers communicate these days. This particular signal is a command value that gets shared across every controller in the assembly...the type of control where you have multiple motors connected to the same shaft..and you want them share total load fairly equally. A digital controller these days will simply be connected to its other sibling over serial...and exchange values. – Vishal May 09 '14 at 07:59
  • Ah, the picture you paint makes your question much more reasonable. If you're still having to design more components on the board, I don't understand why you couldn't find a PIC component with a super-set of the features you need. Porting PIC code between devices isn't terribly difficult. You have quite strict DAC requirements and you're trying to hack it up with a pwm. Adding a 4th order filter is likely your best option at this point. – horta May 09 '14 at 14:26
  • I had another idea: if you really just want to generate a signal that has the same duty cycle and lasts a half a period, you could add a falling edge detector and a monostable 555 timer circuit to get your other signal you were originally after. See these links: http://pubs.sciepub.com/ajeee/1/2/1/figure/5 http://en.wikipedia.org/wiki/555_timer_IC#Monostable In the 555 circuit, make sure you use a high quality capacitor that doesn't vary too much with temperature to ensure a consistent 50% duty cycle for your period. – horta May 09 '14 at 14:41