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I am reading about "flip flop" circuits (and I've bought one as an integrated circuit to mess with). When it says that when the SET goes high, then Q (output) will be high, what is "high" in relation to? Could I feed in -5v and call that low, while 0v is high? Or connect +5v and call that high and 0v low? Or are flip flops usually biased so that they expect a positive or negative voltage at their terminals?

The IC that I bought has the following terminals: SET, RESET, DATA, CLOCK, Q and Q(with bar over it).

NickRamirez
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"High" and "low" are the digital output levels. For CMOS, these will usually be the supply and ground level, respectively. To see what that is, read the datasheet. Even crappy datasheets will tell you what power voltage the part needs. The datasheet should also tell you the maximum guaranteed logic low voltage and minimum guaranteed logic high voltage, within the current source/sink range also defined in the datasheet.

Olin Lathrop
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  • I might just be bad at reading these. But it does have a "recommended operating conditions" section that lists Min. Voltage as 3 and Max as 18. Maybe that's it? The datasheet is from jameco.com. (https://www.jameco.com/Jameco/Products/ProdDS/893443.pdf). So LOW would be less than 3 and HIGH would be 3 or greater? – NickRamirez Feb 17 '14 at 19:41
  • First, get the real datasheet, not something sanitized by Jameco. Second, 3-18 V appears to be the allowed power supply range from what you say. To find what the high and low output voltages truly are, you have find the Vout-high-min and Vout-low-max *within* whatever power supply voltage you are using. – Olin Lathrop Feb 17 '14 at 19:50
  • Thanks, that helped me figure out what to look for. There was a table listing those things. – NickRamirez Feb 17 '14 at 19:58