What is the basic idea behind the so-called "diamond buffer"?

Question

The idea for this question came about after I wrote an answer to a similar question. This "diamond solution" was something unknown to me. I took a look at Wikipedia page (see the picture below) and it immediately impressed me.

(The picture is taken from Wikipedia)

It is also interesting where this name came from. If it is because of some visual similarity between this crossing of the collectors of the input transistors and the construction of the diamond crystal, it turns out that many years ago I also invented a "diamond circuit" of a zero voltage indicator :-) Here is a picture of the circuit from the description of my 1982 patent.

I want to clarify that I do not have a prepared answer, but I am willing to take advantage of my right to write one. Even if nothing remains to be said, I would gladly illustrate by experiments the evolution of this idea as I see it.

Answer 1

Here are my thoughts after taking a good look at the diamond buffer.

To simplify things, I'll assume a load at the output is sinking current to ground, so that the lower half (the "pushing" part? I never know which is doing the pulling, and which is pushing) is idle when the input is positive. We can ignore that lower half for now, and focus on the upper "pulling" section.

I'll compare two approaches to driving the base of the output transistor (Q2 below), both of which apply an offset of +0.7V to the input potential, to eliminate crossover distortion:

^{simulate this circuit – Schematic created using CircuitLab}

Q2 is operating as an emitter follower, whose potential at OUT is 0.7V lower than its base, due to its base-emitter junction having 0.7V across it.

Above left, a +0.7V input offset is achieved using diode D1. R1's purpose is to provide a source of current for D1, so that it can develop the required 0.7V potential difference. It must also source all base current necessary for any load current, drawn from Q2's emitter.

On the right, the +0.7V offset is produced by the base-emitter junction of Q1 (note that it's PNP). This time R1 is also replaced by a constant current source, which acts as a "load" for Q1 to form another emitter follower. I'll discuss the benefits of using a current source later, but just be aware for now that like R1, it must simultaneously source enough base current for Q2 and emitter current for Q1, under all circumstances.

In both cases, the combined offsets of +0.7V from D1/Q1 and −0.7V from Q2 cause OUT and IN to have roughly the same potential, effectively overcoming most of the input "dead zone" between 0V and +0.7V that would be present without D1/Q1, and which would be responsible for crossover distortion in a complete push-pull arrangement.

---

Current through R1 (above left) must be sunk either via Q2's base, or by the input voltage source V1. Which way it goes depends on the load. In this next example I'm using the circuit above left, and loading the output to draw either 2A (left) or 0.2A (right). I've set Q2 to have \$\beta\approx 100\$, and I am applying a 5V input:

^{simulate this circuit}

I've chosen R1 such that in both those circuits current through it is fixed at a little under 20mA (since the voltage across R1 is fixed too), but that current splits into two paths. Either it is sunk by the base of Q2, or by D1 and V1, and the proportion of that 20mA total in each path is dependent entirely on severity of the load. There are a few noteworthy points:

• Under low output load, almost all R1's current flows via D1, to be sunk by V1. Under high load, much of that current is diverted into Q2's base instead.

• The diode is a less than ideal way to get a 0.7V offset (see VM2). The actual offset that it produces varies wildly (150mV change here) with variation in load, since the current through it varies wildly. This could be mitigated a lot by using a diode-connected transistor instead of a diode.

• Output potential varies at least as much as D1's potential difference.

• V1 is required to sink up to 20mA, too much to ask of a typical op-amp.

These are failings that the diamond buffer aims to resolve, by using an emitter follower Q1 instead of diode D1. I'll leave R1 in place, without addressing the current source just yet. Here are the same load scenarios, but with Q1 replacing D1:

^{simulate this circuit}

Notice that:

• Input offset goes from 770mV to 660mV, a change of 110mV between loads. A small improvement, not as dramatic as I had anticipated.

• Input source V1 is sinking well under 1mA, a huge improvement. That's because almost all R1's current is being sunk into via Q1's emitter to ground. The combined current gain of Q1 and Q2 is many thousands, and so demand for current from V1 will be commensurately small.
  This is a perfectly acceptable load on an op-amp output.

---

Already that's a big improvement, but there's more; we still have to talk about current source I1. To understand why it's a good thing, start by understanding the limitations of using resistance R1. Remember that R1 is the only source of base current for Q2. Q2's base potential can't rise any higher than R1 can "pull" it. R1 introduces a constraint to Q2's maximum possible base current, and therefore also maximum collector and emitter current.

In the above examples, I chose R1 to be able to provide 20mA of base current for Q2, but when the load requires more than \$\beta_{Q2} \times 20mA = 2A\$, that value for R1 is clearly too high. If we raised \$V_{IN}\$ any further, the voltage across R1 must reduce, and the current through it will eventually fall to the point where it provides insufficient base current for Q2 to stay on.

Let's take a look at what happens to the output of the above circuit as I sweep input potential from 0V upwards:

R1 places a huge constraint on the current our circuit can provide to its load, 2A in this case. And with our load of 2.5Ω that current limit prevents the output from ever exceeding 5V.

This is what happens when we set our input to 12V, for a 12V output, but we sweep the load current upwards from 0A:

It's a lovely current limited voltage source, which might be exactly what you need, but here I am interested in how R1 can be problematic. Making R1 smaller will raise the maximum base current available to Q2, which, on its face is fine, but by doing so you increase quiescent current through Q1, when the load is small, or input potential is low. I've lowered R1 to 115Ω here (the reason for which is explained below):

^{simulate this circuit}

There's more than 120mA flowing through Q1, even with zero input, and negligible output current. Considering that Q2's base doesn't ever require or draw more than 20mA (assuming we never need more than 2A out, \$I_{B(MAX)}\approx\frac{I_{E(MAX)}}{\beta}=\frac{2A}{100}=20mA\$), this is 100mA more than we need. Quite the waste.

A little algebra should clarify this. If our supply potential is \$V_S\$ and input potential is \$V_{IN}\$ then by KVL the voltage \$V_{R1}\$ across R1 is:

$$ V_{R1} = V_S - V_{BE} - V_{IN} $$

Mr. Ohm tells us the current \$I_1\$ through R1:

$$ I_1 = \frac{V_S - V_{BE} - V_{IN}}{R_1} $$

Maximum output current will be a little less than:

$$ \begin{aligned} I_{OUT(MAX)} &\approx \beta_{Q2} I_1 \\ \\ &\approx \beta_{Q2} \frac{V_S - V_{IN} - V_{BE}}{R_1} \end{aligned} $$

However, to see the real problem with R1 we must consider not only the current through it for maximum load, but also with zero input, because that's when the voltage across R1 is at its greatest. So, lets find a value for R1 which satisfies a need for 2A maximum output current when the output is 12V, for instance:

$$ \begin{aligned} R_1 &= \beta_{Q2} \frac{V_S - V_{BE} - V_{IN}}{I_{OUT(MAX)}} \\ \\ &= 100 \frac{15V - 0.7V - 12V}{2A} \\ \\ &= 115\Omega \end{aligned} $$

And now lets see what quiescent current flows with zero input:

$$ \begin{aligned} I_1 &= \frac{V_S - V_{BE} - V_{IN}}{R_1} \\ \\ &= \frac{15 - 0.7V - 0}{115} \\ \\ &= 124mA \end{aligned} $$

That's a lot of current, considering only a maximum 20mA of it will ever flow into Q2's base. As i said, what a waste.

---

Since lowering R1 isn't a great idea, what if we replaced it with a current source of a little over 20mA, say 25mA? That way 20mA is always available for Q2's base (enough for our required output current of 2A maximum, \$\beta \times 20mA = 2A\$), and any current that doesn't flow there is left over to operate the emitter follower of Q1:

^{simulate this circuit}

Problem solved. Quiescent current is fixed at 25mA, Q2's base is never starved of current, and there's a little left over for Q1.

Unlike R1, the current source also enables the base of Q2 to reach potentials very near the supply, meaning that the only reason the output would be voltage-constrained is if Q2's base current demand is more than I1 can provide.

By lowering I1's current, you limit maximum base current for Q2, which places a cap on maximum output current. Obviously it relies heavily on \$\beta\$, but this could be way to prevent an output short-circuit from destroying things.

---

It remains to make a complete, practical push-pull stage, using these values, and see how it performs.

^{simulate this circuit}

I've had to employ the usual trick of emitter degeneration with R5 and R6, biasing Q2 and Q4 slightly more "off" to reduce their quiescent current. That will naturally reduce gain somewhat under load:

That's nice, no crossover distortion, very wide output voltage swing, beginning to clip a little past 12V. If I replace RL with 3Ω that will double the load current, and we should see Q2 and Q4 get starved of base current at about 6V or so:

The diamond buffer. Pretty neat.

Answer 2

The basic idea is a zero-offset follower. Note that T1 emitter is V_BE above V_in, and only sinks current; I_E1 sources the necessary difference (with respect to some load we might apply to the emitter), but can't be arbitrarily large without costing massive quiescent current (it's only linear in class A operation).

If we add a second, complementary emitter follower after -- T2 -- the V_BE roughly cancels out. But T2 still needs emitter bias current. On the upside: if the transistors and currents are matched (or more specifically, matched current density*), V_BE will match as well, giving zero offset voltage, and a low output impedance (if not a wide current range, as explained above).

*In a monolithic design, all transistors have the same basic V_BE and I_C characteristic, scaled by area. So they can achieve current amplification (i.e. I_E2 > I_E1) by making T2 larger than T1, and still get zero voltage offset.

If we duplicate the entire circuit, we get complementary voltage offsets, and output currents can flow through each other (T2 and T4) without separate biasing. Indeed, notice the circuit reduces to a pair of current mirrors, if we rearrange slightly:

^{simulate this circuit – Schematic created using CircuitLab}

(I think the DC .OP in this simulator tool doesn't quite balance because the 2N3904/6 default models probably don't quite match.)

Note that Q1-Q3 can be swapped, and then Q2/Q4 emitter grounded, to get a pair of the basic current mirror circuits. Back-to-back current mirrors with one emitter floating like this, basically means the current ratio (between VCC and VEE) can vary; which is to say, it's an effective buffer, with class AB operation, with quiescent current set (at zero output voltage) by I_Es.

Answer 3

I was curious to see just how this diamond buffer performs, so I made this LTspice simulation. I adjusted the bias resistors R1 and R2 to just barely exhibit clipping with a 4.5 V sine wave and 5 VDC supply rails. With a 100 ohm (45 mA) load, no crossover distortion is visible.

Quiescent current with zero input is about 6.6 mA, with about 2.15 mA through R1 and R2, and 2.3 mA through Q3 and Q4.

I think I'll run another simulation at a higher frequency with a pulse train. So here it is. The pulse train is 4.5 V on and 0 V off. So it shows that the zero level output is only 30 mV.

Rise time is about 100 ns, and the input has 40 ns transitions.

(edit) Last night as I was going to sleep I wondered if this same circuit might work with MOSFETs. I was surprised and pleased to see that it worked just fine, with even less quiescent current. It does not work very well with a 100 kHz pulse train, however, but that seems to be a function of the 2k bias resistors and the input capacitance of Q3 and Q4. And even more so with the 10k input resistor.

Realizing that a simulation may not accurately reflect variations in real components, I changed M1 to BUK9219-55A, M2 stays FDC638P, M3 to FDS4072NP, and M4 to FDS9934_P. I also used a 10 ohm load. A 10 kHz square wave seems to work fairly well, and here is the same circuit with a 10 kHz sine wave, where some cross-over distortion is present:

Some deficiencies of this design are some DC offset, which can be nulled out, and non-linearity of gain at low levels. I don't know if that is because of the different MOSFETs or a characteristic of the design itself. Driving it with an op-amp and negative feedback should take care of those issues.

Answer 4

After the brilliant answers to my question, I have no choice but to summarize and arrange the most basic ideas of this really "diamond" circuit solution. I will do so by following the evolution of this idea in successive steps accompanied by CircuitLab experiments (same as in the other answers but arranged in a slightly different way). This is a fictional story in which I mentally put myself in the place of inventors to imagine what they were thinking when inventing.

Circuit evolution

To begin with, let's imagine that we have just had the brilliant idea of ​​splitting the operation of an emitter follower into two parts corresponding to the two half-waves of the input voltage... and assigning them to two separate complementary (NPN and PNP) transistors. This is how the so-called "class B amplifier" was obtained.

^{simulate this circuit – Schematic created using CircuitLab}

No biasing

With a negative input voltage (Vin = -10 ÷ 0 V), only the lower PNP follower works.

With a positive input voltage (Vin = 0 ÷ 10 V), only the upper NPN follower works.

The two "half followers" constitute a "full follower" that works in the full input voltage region (Vin = -10 ÷ 10 V).

But there is a "dead zone" Vin = -0.6 ÷ 0.6 V which must be "skipped...

Diode biasing

To do this, we need to add 0.6 V (Si Vbe) to Vin before applying it to Q1's base and subtract 0.6 V from Vin before applying it to Q2's base. Thus we will obtain the so-called "class AB amplifier".

To implement this "biasing" idea, we need to connect small 0.6 V floating voltage sources in series to the input voltage source. The voltage drops that we have to compensate for appear across base-emitter junctions, which are essentially "diodes". Therefore, the first thought that comes to mind is to use the forward voltage drops across diodes as compensating bias voltages.

For this purpose, we "stretch" a string of two diodes D1 and D2 through a "pull-up" resistor R1 and "pull-down" R2 between the supply rails.

^{simulate this circuit}

As a result, the "dead zone" is skipped - Q1 starts working as soon as Vin becomes slightly positive and Q2 as soon as Vin becomes slightly negative. As we can see from the graph, the output voltage exactly follows the input voltage.

Usually, ordinary diodes are implemented as "active diodes" (transistors with voltage-type negative feedback between the collector and emitter), but for the purposes of this conceptual explanation, I will continue using ordinary diodes in the next schematics.

Increasing input resistance

The bias circuit decreases the input resistance because it is connected in parallel to the input. So the next idea can be to put emitter followers before the "push-pull" stage. An additional benefit is that they add more current amplification.

^{simulate this circuit}

But the emitter followers also add another voltage drop Vbe to the existing one...

Double diode biasing

To compensate the two Vbe voltage drops of Q1 and Q2 (1.2 V in total), we add two more diodes (D3 and D4) in series to existing (D1 and D2). They first "raise" the input voltage with 2Vbe and then the transistors "lower" it with 2Vbe.

^{simulate this circuit}

The result is the same as above.

Looking for a new idea

We solved the problem above but at the cost of four diodes... and we do not like that. That is why we keep looking for the perfect solution. Looking at the circuit above, we notice something interesting - NPN followers lower the input voltage by Vbe and PNP followers raise it by so much. And how stupid, we have arranged identical followers one after the other - two "lowering followers" at the top and two "raising followers" at the bottom!

Swapping input transistors

Here is the new idea - we just need to rearrange the followers so they become "raising" -> "lowering" on the top and "lowering" -> "raising" on the bottom. Then, Q1 will raise the input voltage with Vbe and Q3 will lower it with the same Vbe; Q2 will lower the input voltage with Vbe and Q3 will raise it with Vbe. What a clever really "diamond" idea!

^{simulate this circuit}

Summarization

We can see three powerful ideas in putting swapped emitter followers before the inputs of the push-pull stage:

• using the (otherwise unwanted) Vbe of the input transistors for something useful - as a bias voltage for the next push-pull stage.

• providing a high input resistance

• adding a current gain