I'm having a hard time understanding how to calculate input impedance of the inverting op amp. First, which two points do I need to calculate the impedance between? Is it between the two points indicated by the red line on the picture above? In this case I don't understand why the impedance is equal to Rin. It seems to me that it should be infinite because the impedance between the op amp inputs is infinite. What am I missing here?
Thank you!
In a traditional inverting opamp circuit, where ((all)) of the operational parameters are within their ranges, the inverting input node behaves as if it were galvanically connected directly to GND. It isn't, of course, but it can mimic a true ground connection so well that it has a name - Virtual Ground - and its own Wiki page:
https://en.wikipedia.org/wiki/Virtual_ground
UPDATE 1: The mimicking happens because, in a closed-loop, linear system, the opamp does whatever it takes to keep its two inputs at the same voltage. So whatever the current is through Rin, the opamp drives Rf such that an equal but opposite (because it is the ((inverting)) input) current flows into the node, and the voltage at the Rin-Rf node just sits there at 0 V (or whatever voltage the non-inverting input is tied to).
UPDATE 2: Because there is a real, physical delay between the inputs and output of an opamp, closing a negative feedback loop works like this. The input changes; let's say it goes a bit negative. Now, the inverting input is less than the non-inverting input; or, the + input is more positive. When the + input goes up, the output goes up (the definition of "non-inverting"). This increases the voltage at the right side of Rf, which increases the voltage at the left side of Rf which is the inverting input, making it equal to the non-inverting input again. Since the non-inv input is connected to GND, the effect is that even though the input signal changed, the voltage at the inv input did not; it appears stuck to GND.
Here is where the controllable gain happens. Because Rf and Rin form a two-resistor voltage divider, they control how much the output has to change to pull the input back to a zero voltage difference. Example: Rin = 10K; Rf = 100K. In order to hold the center node (which is connected to the - input) at 0 V (OR (important) at any other fixed voltage), if the left side of the divider goes down 1 V, then the right side has to go up xxx V to maintain the center node at no change. If the input signal goes down to -1 V, the opamp output goes up. If it goes to only +9 V, the - input still is lower than the + input by 0.9091 V so the output keeps going more positive.
Remember that there is a delay time between when the input changes and when the output "catches up". When the output passes 10 V and everything should be balanced, it takes a while for that input condition to make it though the opamp circuitry and affect the output, and diring that time the output keeps increasing. If the output goes to 11 V, now the - input is more positive then the + input by 0.9091 V, and this drives the opamp output to go more negative. And up and down and up and down. This is a decreasing-amplitude sinusoidal oscillation called ringing; it eventually decays to 0 V, and is very visible when an opamp is hit with a very fast input signal change. "Normal" opamps have an internal lowpass filter (called "compensation") so the output overshoots way less than 1 V, but many datasheets have a oscillograph showing the overshoot and/or damped ringing.
This entire analysis also can be worked through using the currents in the two resistors rather than the voltages across them.
UPDATE 3: The reason it is called a virtual "ground" is that in traditional amplifier circuits with bipolar supplies, the non-inverting input is referenced to GND, usually through a resistor. But a more pedantically correct term would be "virtual reference potential". Negative feedback drives the - input to equal the + input - whatever that voltage is. This is how a two-resistor voltage divider at the + input holds the opamp output at Vcc/2 in a single-supply circuit. But even with the DC offset, the invarience characteristic still is there. """The ground is strong in this one."""
First, which two points do I need to calculate the impedance between? Is it between the two points indicated by the red line on the picture above?
Yes, this is the circuit input impedance (between the left Rin end and ground) that is different from the op-amp input impedance (between its two inputs).
It seems to me that it should be infinite because the impedance between the op amp inputs is infinite.
Really, the op-amp input impedance is infinite... but if the op-amp was standalone. Note that here a network consisting of two elements in series (Rf and the op-amp output) shunts the op-amp differential input (ie, it is connected between them). So this network determines the resistance between the op-amp inputs. Let's see what its resistance is...
The input current flows through Rf and creates a voltage drop VRf = Iin.Rf. To keep the voltage at the inverting input equal to zero (obbeying the so-called "golden rule"), the op-amp adjusts its output voltage equal to the voltage drop across Rf (Vout = -Iin.Rf) and adds it in series. The op-amp output serves as a variable voltage source that copies the voltage drop across Rf and removes it. As a result, the differential voltage between the op-amp inputs is zero (Iin.Rf - Iin.Rf = 0). Thus there is current flowing but there is no voltage... so the resistance of this network (and between the op-amp inputs) is zero... virtual zero. Figuratively speaking, the inputs are short connected by something like a "piece of wire".
So, the conclusion is that the circuit input impedance is determined only by Rin.
The conceptual picture below illustrates my explanations. Pay attention to something very important for understanding the circuit - the four elements (two voltage sources and two resistors) are connected in a loop and the same current flows through them (its trajectory is drawn in green). Also note another very important property of this configuration - the two voltages Vin and Vout have the same polarity when travelling the loop; so they are summed according to KVL.
Try to grasp the idea; if you have any questions, I will be happy to answer. I know it will be a little difficult for you to understand my slightly unconventional explanations... but if you succeed, the benefits will be great for you... You will know what the secret of op-amp inverting circuits is. For example, you can easily answer a similar question.
In the edit below, I have exposed some basics of my philosophy about negative feedback circuits as a response to AnalogKid's updates.
… the opamp does whatever it takes to keep its two inputs at the same voltage.
Undisturbed follower. Although it is possible for an op-amp to change the voltages of both its inputs (for example, in an NIC), in most cases it only changes the voltage of its inverting input so that it (always) follows the voltage of its non-inverting input. The latter is permanently zero (in the case of the inverting amplifier) or is initially zero (in the case of the non-inverting amplifier). So, by its nature, the op-amp circuit with negative feedback is a zero voltage follower. Its simplest implementation consists of only one op-amp whose output is connected to its inverting input.
Disturbed follower. From now on, each new element inserted (resistor, capacitor, diode, transistor, etc.) or voltage or current applied (Vin, Iin) acts as a "disturbance" for this initial follower since it tries to change the zero voltage reference. The op-amp reacts to the disturbance to overcome it and we take its reaction as an output. In this way, all possible op amp circuits with negative feedback can be obtained by intentionally disturbing them.
So whatever the current is through Rin, the opamp drives Rf such that an equal but opposite (because it is the ((inverting)) input) current flows into the node, and the voltage at the Rin-Rf node just sits there at 0 V.
I would say: Since the input voltage source pushes a current through R1 into the node but the op-amp draws the same current through R2 from the node (or the input source draws a current via R1 from the node but the op-amp pushes the same current via R2 to the node), the voltage of the node does not change.
From another point of view, this 4-element configuration can be seen as a balanced bridge.
Because there is a real, physical delay between the inputs and output of an opamp...
Exactly! Strange as it may seem, it is this delay that makes it possible to explain the circuit operation. If we consider the op-amp as a device without delay (Vout = k.Vin), we fall into a vicious circle.
The input changes; let's say it goes a bit negative...
So, when Vin changes (eg, decreases), in the first moment, Vout does not change… and the voltage divider R1-R2 is driven from the left side by Vin. After a while, the op-amp responds to the change by starting to increase its output voltage… and now the voltage divider R1-R2 is driven from the right side by Vout.
But a more pedantically correct term would be "virtual reference potential".
Exactly! "Virtual ground" is a voltage source whose voltage is a "copy" of another (reference) voltage (that can be zero). Figuratively speaking, virtual ground is a clone of another but real ground.
In 2007, I put a lot of effort into finding out what virtual ground really is and telling it on Wikipedia. Here is an old revision of the page and a heated discussion on the talk page. In the end, the page was trimmed and is now in a miserable state (Wikipedia EE is another place where there are terrible people; the only strange thing is how they are allowed to run wild).
If the op amp has an open loop gain of 1 million, and your circuit has a gain of 10, then the input signal is effectively attenuated by a factor of 100,000 at the input, and then amplified by 1 million by the device, for a circuit gain of 10.
Original representation of the negative feedback arrangement that I have never seen! I use two approaches to presenting it:
Amplifier. If the amplifier used to build the negative feedback circuit has a relatively small gain, I consider it as an amplifier with some moderate gain; then its input voltage cannot be ignored. This is the case in transistor circuits.
Integrator. If the amplifier used to build the negative feedback circuit has an extremely high gain, I simply consider it as an integrator… and I do not talk about gain at all.This is the case in op-amp circuits.
In many circuits (whether involving op-amps or not), I think it is helpful to separate the behavior of the circuit immediately after a change in input, versus what happens after a new equilibrium has time to be reached. The former is the high-frequency response of the circuit; the latter is low-frequency or DC response.
Your question is almost certainly asking about the low-frequency or DC input impedance, however it can be instructive to think about the transient behavior in getting there.
Let's connect a step current source to the input of our inverting amplifier and see what happens when it steps from \$0\$ to \$1 \ \mu \text{A}\$ at \$t=0\$:
simulate this circuit – Schematic created using CircuitLab
The result looks something like this:
Initially, the op-amp's output hasn't had time to change its voltage yet. It stays at \$0 \ \text{V}\$. The \$1 \ \mu \text{A}\$ current from \$I_1\$ flows through both \$R_\text{in}\$ and \$R_\text{f}\$, causing voltage drops on each. The voltage at the inverting input terminal V(div) drops immediately to \$-R_\text{f} \cdot I_1 = -990 \ \text{mV}\$. And V(in) becomes \$-(R_\text{in} + R_\text{f}) \cdot I_1 = -1 \ \text{V}\$. This happens essentially immediately after a change in input current. The immediate, high-frequency input impedance \$ | \frac {V_\text{in}} {I_1} | = 1 \ \text{M} \Omega = R_\text{f} + R_\text{in}\$.
As time passes, the op-amp "notices" the voltage difference between its two terminals, and it starts to increase its output voltage because the non-inverting terminal is at higher voltage relative to the inverting terminal.
The op-amp continues to increase V(out) until V(div) = 0, so the + and - terminals are equal again. At this point, we'll find V(out) = +990 mV and V(in) = -10 mV. The DC input impedance is just \$ | \frac {V_\text{in}} {I_1} | = 10 \ \text{k} \Omega = R_\text{in}\$.
We can plot the input impedance versus frequency directly using the expression MAG(V(in)/I(I1.nA)) in the frequency domain simulation:
The result looks like this:
At low frequencies (after the op-amp has had time to reestablish equilibrium), the input impedance is \$R_\text{in}\$. At high frequencies (before the op-amp finds its new equilibrium), it's \$R_\text{f} + R_\text{in}\$. But you can read this frequency-domain plot from right to left -- from high frequency to low frequency -- and it tells the same story of the feedback loop taking time to stabilize.
This frequency-dependent input impedance and other aspects like stability and compensation are covered in greater detail in the Op-Amp Inverting Amplifier section of my Ultimate Electronics Book (in progress).
