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What is the relationship between junction area and voltage in forward biasing? My book said that the voltage to establish forward biasing increases with decreasing of junction area. Why?

EDIT: The question is about BJT which has two junctions, base-collector junction is greater than base-emitter junction. In saturation region the two junctions are forward biased, but

$$V_{CE}=V_{BE}-V_{BC}=0.2V$$

thus the larger junction area has a lower voltage in forward biasing.

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Gennaro Arguzzi
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  • Can you provide a reference to the book, or an exact quote? It seems that you may have misinterpreted what it said because it doesn't make much sense. The voltage characteristics of a junction are about the fields within it, which depend on doping profiles, etc., but not on area. – Dave Tweed Jun 25 '16 at 10:45
  • Hi @Dave Tweed, I have not explained well. I have two different pn junction and I want to know how change the voltage in these. In general the books says that the voltage to turn on the junction is 0.7 V. If I take two junction with different dimension, what will happen to the voltage in exam? Thank you very much. – Gennaro Arguzzi Jun 25 '16 at 10:54
  • Just as a wild guess, does your question have anything to do with how a [bandgap voltage reference](https://en.wikipedia.org/wiki/Bandgap_voltage_reference) works? – Dave Tweed Jun 25 '16 at 14:26

2 Answers2

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Theoretically, p-n junction area has no influence on forward biasing voltage, as forward biasing voltage is a consequence of opposing an electric field normal to the contact surface between p region and n region (i.e. the vector representing the electric field has no component parallel to that surface).

Also, as you may suspect, p-n junction area influences the magnitude of the current running through.

Advice: find the appropriate book and work out the math leading to the Shockley diode equation to understand in detail the whole matter.

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Electrical Architect
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The Diode equation is:

$$\large I_D = I_S(e^\frac{V_D}{\eta V_T}-1)$$

A diode having a higher reverse saturation current \$I_S\$ for a given forward volt drop \$V_D\$, the forward current \$I_D\$ will be higher. In other words, for a given forward current, there will be a smaller forward volt drop for a diode having a higher reverse saturation current.

In saturation, the BC junction is forward biased and, because it has a larger surface area compared to the BE junction, it will have a higher reverse saturation current. Hence, it has a lower volt drop from base to collector than base to emitter.

$$V_{BE} > V_{BC}$$ $$\implies V_{CEsat} = V_{CE}=V_{BE}-V_{BC}= \text{a small positive voltage}$$

Therefore, collector will always be at higher potential as compared to emitter voltage when the transistor is in saturation because it is always being "held up" (or supported by) the base voltage.

Simba
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