4

This is with regards to the discussion in the comments in my answer to this question with regards to the charge stored in a Flash.

The way a Flash memory works is that it either stores a small charge (signifying logical 0) on the gate of a floating gate transistor, or doesn't store it (signifying logical 1).

Capacitors, batteries etc are often said to store charge, but in reality they store energy but no net charge since there is always the same number of positive and negative charges on opposite plates.

Now, the question is: is there ever net electric charge stored on any transistor in a Flash chip, such that Kirchoff's current law is temporarily breached? (Presumably charge conservation holds, so electrons from the programming current trapped on the gates are later balanced when erasing that memory cell). Or are the charges of the trapped electrons balanced internally to the transistor by, for example, holes (in the sense of semiconductor theory, an absence of an electron in the valence band) in the substrate?

References to credible sources on the matter are highly appreciated.

Timo
  • 1,179
  • 1
  • 12
  • 30
  • The memory storage is essentially capacitive as far as I know. There isn't really any method within an IC to capture or eject charged particles (as far as I know). – user57037 Jan 22 '16 at 02:21
  • 1
    @mkeith: every description of flash memory I've read mentions hot-electron injection and quantum tunneling. Both of those methods capture or eject charged particles. – davidcary Jan 23 '16 at 14:23
  • @mkeith and Timo: I hope you don't mind the recent tweak to the question to focus on "net charge on any transistor" rather than "net charge of the entire chip". Even though I'm sure mkeith is right that there is no net charge stored on the entire chip as a while, a net charge on any one transistor (balanced by an opposite charge elsewhere on the chip) would still be a surprising violation of Kirchoff's current law. (Feel free to revert if you think that's too much of a change). – davidcary Jan 23 '16 at 15:52
  • @davidcary, captured or ejected from the silicon to the environment? Or captured and ejected between the regions of the transistor? It has been a long time since I studied detailed device physics. But you can write an entire book on circuit design without ever considering exceptions to KVL and KCL. – user57037 Jan 23 '16 at 16:03
  • @davidcary your edit is fine by me. – Timo Jan 23 '16 at 16:50
  • @mkeith: Net charge transfer between regions of one transistor, between one transistor and another part of the same chip, or between one transistor and the off-chip environment? The descriptions I've read are a little vague on this detail, so I don't know. – davidcary Jan 23 '16 at 22:14
  • Seems to be outside my area of knowledge and experience. But there are some high quality answers now. So... – user57037 Jan 23 '16 at 22:30

3 Answers3

4

In the whole transistor, no. In the floating gate, yes. In the body of the semiconductor, yes.

Explanation time: Your understanding of capacitors is incorrect. Capacitors don't move charge. They have no field producing components and are completely passive in every way shape and form. They do store charge, of an equal and opposite kind, on each plate. Just like this, Flash also stores charge, however it does so on a floating plate by tunneling electrons onto the plate. The total charge in the universe is conserved because an equal amount of charge develops in the semiconductive material allowing for either a channel to be formed or destroyed.

That "net charge" does exist, but only if you look at one plate at a time. And just as was discussed in the other question, eventually those charges will leak and the "net charge" on each plate will be gone, obeying Kirkoff's laws, which at its most simple form is really just conservation of matter (you didn't make any electrons from nothingness to charge the plate, you took them from somewhere).

In the end it's just a matter of perspective: Do you include both plates in your arbitrary geometry used to measure field? If so, then there is no net charge. Do you include only one plate in your arbitrary geometry used to measure filed? If so, then there is a net charge creating a field going somewhere outside of your geometry.

Edit: The question was changed and so the answer has changed somewhat too.

Now, the question is: is there net electric charge stored on the Flash chip in the form of electrons from the programming current trapped on the gates, such that Kirchoff's current law is temporarily breached (to be balanced when erasing the chip: charge conservation of course always holds), or are the charges of the trapped electrons balanced internally to the chip by, for example, holes (in the sense of semiconductor theory, an absence of an electron in the valence band) in the substrate?

The answer to which is the second option. Electrons trapped on the floating plate induce an accumulation of holes in the semiconductor. This accumulation layer acts like a break in the transistor circuit which is why it acts like a logical zero. As a reference, I pointed to a MOS capacitor, which is the basis of most field effect transistors in production today.

Dave
  • 1,792
  • 8
  • 17
  • I was inaccurate in how referred to capacitors, sure, current flows through them accumulating equal amounts of positive and negative charge. I know that charge, in total, is conserved. I sharpened the question a little. – Timo Jan 22 '16 at 09:38
  • @Timo Yeah. It's that second one. That's why stored charge signifies a logical 0: no current can flow through region that's high in holes (accumulation layer). If you want a source just look up mos capacitor. – Dave Jan 22 '16 at 10:32
  • Looks like you're right, for example [this](https://smartech.gatech.edu/bitstream/handle/1853/7540/gray_jordan_d_200512_mast.pdf) explains the process specifically using the electron-hole picture of a semiconductor. The MOS capacitor was the crucial term to include in the search, without it one tends to get toy-model explanations that can mislead into thinking charge is actually captured from the programming current. – Timo Jan 22 '16 at 11:39
  • I'd like to accept your answer, since you stated the correct answer and pointed to the right path in finding the reference. However, what's written there now may not be optimal with respect to the edited question, as it concentrates on the capacitor thing, and no references are mentioned in the answer itself. Would you mind if I edited your answer a bit, or would you like to edit it yourself? – Timo Jan 22 '16 at 11:44
  • 1
    @Timo, I've edited it, but if you think it needs more, I'd gladly accept your edit. – Dave Jan 23 '16 at 02:04
  • Uh, sorry, I didn't expect to receive another answer, and that one was pretty much what I was looking for: an explanation which shows clearly that the charges come from electron-hole pair creation, topped up with a reference. So I'm accepting that one, but you'll definitely get my +1. – Timo Jan 23 '16 at 11:55
3

The other answers are excellent, but here's some resources, and A LOT of hand waving.

If you want the details of all of this, I would highly suggest chapter 2 in the thesis by Paul Hasler: http://thesis.library.caltech.edu/2477/
I would also check for the course by Brad Minch, who teaches at Olin, or the book called "analog vlsi" by Shih-Chii Liu. All of us are either directly under Carver Mead, or one degree away.

If you don't want to die with quantum mechanics, here's the short version. I can throw charge onto a gate by making a hot electron in the channel that "throws" charge up into the oxide, and some makes it to the floating gate. I then then apply a large voltage to effectively "thin" the barrier made by oxide to make the gate more positive.

Now, I use pFETs for this because I make analog floating gates, so here are some images from my work: FG pfet The image above is a floating-gate pFET. If I set VDS to be high, and then put the gate, Vg, to be in subthreshold, I can create a field that is high enough to cause impact-ionization of the holes that puts off a hot electron that goes up into "somewhere", and if you are lucky, it's the oxide.

hot-carriers

To make the node negative, I present the dreaded band diagram. If "1" creates enough energy because the of the VDS, you get impact ionization at "2". If "2" has enough energy, it might jump to the oxide "3". It is important to note that this behavior is optimal in subthreshold because of the high field seen at the drain edge.

tunneling

To make the node more positive, I set all of the terminals to 0 volts, but raise the Vtun terminal high to "thin" the tox barrier. (a) is with 0v everywhere. (b) is with Vtun high, so that you get a "thin" barrier, which means there's a probability that you will see Fowler-Nordheim tunneling.

In summary, tunneling is quantum (make the node positive), and injection is classical physics (make the node negative).

b degnan
  • 3,167
  • 2
  • 17
  • 36
  • Thanks, this was a nice answer! The quantum mechanics wouldn't have been a problem here, I'm a physicist although not a solid state physicist. But I can look that up in the thesis you linked. – Timo Jan 23 '16 at 11:56
  • I wasn't sure how deep you wanted to go. The tunneling is ideal for both adding and removing electrons mathematically, but if you actually build something, it's easier to use hot-electrons for one of the modes because of voltages. Thinning the barrier at 200A SiO2 takes 8V. There's some work by Chris Duffy out of Georgia Tech that might be more approachable. Dr. Hasler is the smartest person that I've ever met, and the thesis is very good, but is quite a bit of effort. If you get stuck on specifics, I'm sure you can find me if you try. – b degnan Jan 23 '16 at 12:02
  • I think the overall amount of detail in the answer is good, it can be followed also by people who are not physicists. My main motivation to get an authoritative answer to this question was to make sure I'm right in [my answer here](http://electronics.stackexchange.com/a/211469/54822). – Timo Jan 23 '16 at 12:08
-1

There is no net charge on the IC. If there was, then the whole IC would be charged, and would attract the opposite charge.

In the transistors in flash memory, some electrons are trapped in the gate oxide. This creates an electric field, and this field beings in other (opposite) charges around it. These mobile charges can't cross the oxide barrier, but remain just across from the gate in the silicon. It is actually the presence (or absence) of these charges that makes the transistor conductive or not.

jp314
  • 18,395
  • 17
  • 46
  • 1
    The force of, say, 1000 electrons trapped in every transistor of a 4 Gb flash, on another such chip at 10cm distance, [doesn't seem to big](http://www.wolframalpha.com/input/?i=2^32+*+%281000^2+*+electron+charge^2%29+*+Coulomb%27s+constant+%2F+%28%280.1+meters%29^2%29) that it would be obvious that it isn't possible. – Timo Jan 22 '16 at 09:34
  • So what ? A net charged IC will attract enough of the opposite charge to neutralize it. Small charge --> small opposite charge. It doesn't have to be perceptible to you. – jp314 Jan 23 '16 at 01:16
  • 2
    That's not so clear: when I rub my sweater on my woolen blanket and move them to a distance, they both stay charged for quite a while unless I explicitly ground them (usually by touching them and getting a small shock). There's just not that many loose charges going around that any and all net charges would be immediately neutralized. – Timo Jan 23 '16 at 11:52
  • Who said 'immediately' ? A sweater may be 100 pF and charged to 10k V -- that's a charge of Q=C.V = 1uC. Each element on a flash memory is less than 1 fF, and charged to about 1 V -- 1fC, or 10^9 times less. ICs are manufactured and handled in ionized environments (for the purpose of preventing static build-up), and any unbalanced charge would be neutralized. – jp314 Jan 23 '16 at 16:39
  • The electrons trapped in the gate oxide didn't just come from nowhere -- in fact they came from the drain connection. No net charge is created -- just moved from the drain wire to the gate. – jp314 Jan 23 '16 at 16:40